Vendor: Aragio Solutions Category: High-Speed

2.5V General Purpose Inline IO Pad Set

A full range of power pads is provided to enable the system designer different options for separate core power (VDD and VSS) and …

GlobalFoundries 40nm Silicon Proven View all specifications

Overview

A full range of power pads is provided to enable the system designer different options for separate core power (VDD and VSS) and separate I/O padring power and ground (DVDD and DVSS). The ability to isolate separate power domains is also provided. In addition, the I/O library has a full complement of cells that provide the user with the ability to isolate analog I/O’s and power within the same padring as the digital I/O’s.

Includes:
? Programmable GPIO
? Programmable fault-tolerant GPIO
? Input buffer
? Power supplies
? Isolated analog power supplies
? Oscillators
? Full complement of support pads

What’s Included?

  • Physical abstract in LEF format (.lef)
  • Timing models in Synopsys Liberty formats (.lib and .db)
  • Calibre compatible LVS netlist in CDL format (.cdl)
  • GDSII stream (.gds)
  • Behavioral Verilog (.v)
  • Layout Parasitic Extraction (LPE) SPICE netlist (.spice)
  • Databook (.pdf)
  • Library User Guide - ESD Guidelines (.pdf)

Silicon Options

Foundry Node Process Maturity
GlobalFoundries 40nm 40 400 nm Silicon Proven

Specifications

Identity

Part Number
RGO_GF40_25V33_LP_40C_5VT
Vendor
Aragio Solutions

Provider

Frequently asked questions about High-Speed I/O Pad IP

What is 2.5V General Purpose Inline IO Pad Set?

2.5V General Purpose Inline IO Pad Set is a High-Speed IP core from Aragio Solutions listed on Semi IP Hub. It is listed with support for globalfoundries Silicon Proven.

How should engineers evaluate this High-Speed?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this High-Speed IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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