Overview
Certus is pleased to offer High-voltage ESD solutions across multiple baseline technologies. Distinguishing Certus is our ability to provide high-voltage ESD solutions achieving 10V, 15V and even 20V using only baseline CMOS processing, without additional layers. This allows for straightforward co-integration of higher voltage applications -- such as charge pumps, high power RF, Power Management, and MEMS -- with conventional CMOS designs while keeping processing costs to a minimum.
Built into our IO libraries, and also offered as a separate service, is our strong ESD expertise. Certus was founded by ESD engineers and our results speak for themselves. Not only do we consistently exceed the standard ESD targets of 2KV HBM and 500V CDM, but we also provide on-chip solutions for standards such as IEC-61000-4-2, system-level ESD and Cable Discharge Events (CDE).
Other Certus specialty cell offerings include low-capacitance RF, small-footprint ESD, RGMII, Secure Digital, LVDS, Analog/RF and more across most major foundries and technology nodes. We are particularly suited at providing customized options in a cost-efficient framework. Please contact us for supplementary physical or electrical features that can suit your needs.
Learn more about High-Speed IP core
Certus Semiconductor’s I/O libraries for TSMC’s 22nm ultra-low leakage (22ULL) and 22nm ultra-low power (22ULP) technologies offer robust, high-performance solutions tailored to a wide range of SoC designs — from ultra-low power IoT nodes to demanding consumer and automotive systems. Whether you need low leakage, high drive strength, or analog compatibility, our production-proven IP covers it all.
With the rapid growth of AR/VR and high-resolution imaging systems such as drones and action cameras, MIPI CSI (Camera Serial Interface) and MIPI DSI (Display Serial Interface) require both high data throughput and low power consumption. M31 provides a MIPI C-PHY and D-PHY IP combo solution implemented on TSMC N3P and N3C processes.
Today, High-Speed SerDes serves as the foundation of industry standards such as PCIe, Ethernet, USB, and UCIe, making it a critical technology for modern semiconductor systems. As the industry progresses towards higher data rates and increasingly complex architectures, SerDes continues to play a central role in enabling reliable and scalable connectivity, especially at lower nodes.
This post provides an in-depth look at the fundamentals of high-speed interconnects, AI/HPC trends (HBM/D2D/CPO), and the three critical requirements of Physical AI: Deterministic Latency, Functional Safety (ISO 26262), and Automotive Reliability (AEC-Q100).
Innosilicon, a leading IP provider, offers a complete PCIe 5.0 solution stack that includes both PHY and controller IPs. Although both layers are crucial to achieving a fully compliant and high-performance PCIe interface, this paper deep dives into the technical challenges of PHY design, highlighting insights drawn from real-world design margins, receiver robustness, and advanced jitter analysis in the context of Gen5 systems.
LTTPR support is quickly becoming a cornerstone of next-gen DisplayPort architectures, particularly in automotive, industrial, and multi-display environments. Here's what you need to know.
