CDM Dependence on Device Capacitance
This blog will focus on what happens during the CDM pulse itself, and will show how the pulse properties change as a function of DUT to Field Plate capacitance.
Vendor:
Certus Semiconductor
Category:
High-Speed
Secure Digital I/O offerings
Certus is pleased to offer Secure Digital compliant IOs in technology nodes.
Overview
Certus is pleased to offer Secure Digital compliant IOs in advanced technology nodes. Our SD IOs support DS, HS, SDR25, SDR50, DDR50 and SDR104 protocols. Certus SD solutions are able to detect and dynamically adjust to a VDDIO supply of 1.8V or 3.3V during system operation. Our SD solutions include output enable, a hysteresis receiver, and full interoperability with the feature-rich Certus General-Purpose IO libraries.
Built into our IO libraries, and also offered as a separate service, is our strong ESD expertise. Certus was founded by ESD engineers and our results speak for themselves. Not only do we consistently exceed the standard ESD targets of 2KV HBM and 500V CDM, but we also provide on-chip solutions for standards such as IEC-61000-4-2, system-level ESD and Cable Discharge Events (CDE).
Certus also offers RGMII, I2C, SMBUS, DDC, LVDS, Analog/RF, HV and numerous other IO variants across most major foundries and technology nodes. We are particularly suited at providing customized options in a cost-efficient framework. Please contact us for supplementary physical or electrical features that can suit your needs.
Built into our IO libraries, and also offered as a separate service, is our strong ESD expertise. Certus was founded by ESD engineers and our results speak for themselves. Not only do we consistently exceed the standard ESD targets of 2KV HBM and 500V CDM, but we also provide on-chip solutions for standards such as IEC-61000-4-2, system-level ESD and Cable Discharge Events (CDE).
Certus also offers RGMII, I2C, SMBUS, DDC, LVDS, Analog/RF, HV and numerous other IO variants across most major foundries and technology nodes. We are particularly suited at providing customized options in a cost-efficient framework. Please contact us for supplementary physical or electrical features that can suit your needs.
Key features
- Secure Digital
- System-selectable 1.8V & 3.3V VDDIO support
- Output Enable
- Hysteresis receiver
- Full interoperability with Certus GPIO library
- Power sequence independence
- ESD protection of 2KV HBM, 500V CDM
- Physical Features
- Flexible cell and pad arrangements
- Wirebond and Flip-chip support
- Metal stack variants
Block Diagram
Certus Secure Digital Solutions block diagram
Benefits
- System-selectable 1.8V & 3.3V VDDIO support
- Output enable
- Hysteresis receiver
- Interoperability with Certus GPIO libraries
- Flexible cell and pad arrangements
- Wirebond & Flip-chip support
- Metal stack variants
- Power sequence independence
- Proven HBM & CDM ESD protection
Applications
- Reduced Gigabit Media Independent Interface (RGMII)
What’s Included?
- GDS
- CDL netlist
- Verilog stub
- Verilog behavioral model
- LEF
- Liberty Timing Files
- IBIS (option)
- Electrical datasheet
- User guide and application notes
- Consulting and Support
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 28nm | 28nm 280 nm | Silicon Proven |
Specifications
Identity
Part Number
Certus Secure Digital Solutions
Vendor
Certus Semiconductor
Type
Silicon IP
Provider
HQ:
United States
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Frequently asked questions about High-Speed I/O Pad IP
What is Secure Digital I/O offerings?
Secure Digital I/O offerings is a High-Speed IP core from Certus Semiconductor listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.
How should engineers evaluate this High-Speed?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this High-Speed IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.