130 to 930 MHz Low-noise amplifier
Low noise amplifier (LNA) is usually used as the first stage of receivers and is characterized by low noise figure and high linea…
Overview
Low noise amplifier (LNA) is usually used as the first stage of receivers and is characterized by low noise figure and high linearity. The structure is based on two matched cascades. The first one is a common-emitter bipolar transistor and the second is common-gate FET. Commutable feedback is used to improve the linearity in the lower range of operating frequencies (130...435 MHz).
The block is fabricated on iHP SiGe BiCMOS 0.25 um (SGB25V) technology.
Key features
- iHP SGB25V
- Frequency range 130…930 MHz
- Subband amplifier selection
- Low noise figure
- Feedback circuit for linearity improving
- Amplifier current consumption control
- Gain temperature compensation mode
- Portable to other technologies (upon request)
Block Diagram
Applications
- Input RF preamplification in receiver
What’s Included?
- Schematic or NetList
- Abstract model (.lef and .lib files)
- Layout view (optional)
- Behavioral model (Verilog)
- Extracted view (optional)
- GDSII
- DRC, LVS, antenna report
- Test bench with saved configurations (optional)
- Documentation
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about Amplifier IP cores
What is 130 to 930 MHz Low-noise amplifier?
130 to 930 MHz Low-noise amplifier is a Amplifier IP core from NTLab listed on Semi IP Hub.
How should engineers evaluate this Amplifier?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Amplifier IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.