1024-bit EEPROM IP with configuration 32p2w16bit

The block is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 1024 bits (16(bit per word) x 2(word per page) x 32(page)), which is organized as 32 pages of 2 words by 16 bit with single-bit output data and parallel write data. Data writing in EEPROM consists of 2 phases - erasing and writing. Written EEPROM page data comes to input DIN<15:0>. Erasing of words from page, performed by setting a signal HV_ON, with the signal ERASE is at state «1». The address of erased page is defined the bus ADR<5:0>. Value of the bus ADR<5:0> doesn't change throughout all cycle of deleting (while HV_ON = «1»). Data writing from latches to the words is produced by signal setting HV_ON, thus the signal WRITE is in a state «1». Data reading is performed using the SAMPLE signal. Memory is optimized for usage in the industrial and commercial applications, requiring low power consumption and supply voltage.

• SMIC EEPROM CMOS 0.18 um
• 1024-bit of available memory 16(bit per word) x 2(words per page) x 32(pages) bit
• High density of memory cells
• Writing and erasing data by one high-voltage pulse
• Programming and erase time – 2 ms (determined by specification of the EEPROM SMIC cell)
• Page writes allowed
• Data retention over 10 years (endurance 105 cycles, determined by SMIC technology)
• Low power dissipation in standby and active mode

• Access control systems
• Radio-frequency identification systems, smart cards
• Electronic devices with battery power
• Chip serial ID and chip safety
• Electronic tags UHF band

• Schematic or NetList
• Abstract model (.lef and .lib files)
• Layout view (optional)
• Behavioral model (Verilog)
• Extracted view (optional)
• GDSII
• DRC, LVS, antenna report
• Test bench with saved configurations (optional)
• Documentation