The multi-channel Synopsys PHY IP for PCI Express® 3.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’…
- PCIe Gen3
- UMC
- 28nm
- HPC
- Available on request
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
The multi-channel Synopsys PHY IP for PCI Express® 3.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’…
PCIe 2.0 PHY in UMC (40nm, 28nm)
The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet to…
PCIe 2.0 PHY in TSMC (28nm, 16nm, 12nm)
The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet to…
PCIe 2.0 PHY in SMIC (40nm, 28nm)
The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet to…
PCIe 2.0 PHY in Fujitsu (40nm)
The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet to…
56G Ethernet PHY in TSMC (16nm, 12nm)
The silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE…
25G PHY in TSMC (16nm, 12nm, N7, N6)
The multi-lane Synopsys Multi-Protocol 25G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for hig…
16G PHY in TSMC (28nm, 16nm, 12nm, N7, N6)
The silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE…
16G PHY in Samsung (14nm, 11nm)
The silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE…
12G Ethernet PHY in UMC (28nm)
The silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE…
LPDDR4X multiPHY in TSMC (16nm, 12nm,N7, N6)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-o…
LPDDR4 multiPHY V2 in TSMC (28nm, 22nm, 16nm, 12nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-o…
LPDDR4 multiPHY V2 in Samsung (14nm, 11nm, 10nm, 8nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-o…
DDR4/3 PHY in TSMC (12nm, 16nm, 7nm)
The Synopsys DDR4/3 PHY is a physical layer IP interface (PHY) solution for enterprise-class ASIC, ASSP, and system-on-chip (SoC)…
DDR4/3 PHY in Samsung (14nm, 11nm, 10nm, 8nm)
The Synopsys DDR4/3 PHY is a physical layer IP interface (PHY) solution for enterprise-class ASIC, ASSP, and system-on-chip (SoC)…
The Synopsys DDR4 multiPHY is a physical (PHY) layer IP interface solution for PC/consumer and mobile ASICs, ASSPs, system-on- ch…
DDR4 multiPHY in Samsung (14nm)
The Synopsys DDR4 multiPHY is a physical (PHY) layer IP interface solution for PC/consumer and mobile ASICs, ASSPs, system-on- ch…
USB-C 3.2 SS/SSP PHY in Type-C in TSMC (N7, N6, N5, N3E)
The Synopsys SuperSpeed 3.2 USB IP solution is based on the USB 3.2 specification from the USB Implementer Forum.
USB-C 3.1 SS/SSP PHY in Type-C in TSMC (16nm, 12nm, N7, N6, N5, N5A)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB 3.1 PHY (10G/5G) inTSMC (16nm, 12nm, N7, N6, N5,N3E)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.