5 GHz 250 fs Jitter PLL - GlobalFoundries 22nm
The PLL5G250F is an ultra-low power phase locked loop (PLL) intellectual property (IP) block.
- GlobalFoundries
- 22nm
- Silicon Proven
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
5 GHz 250 fs Jitter PLL - GlobalFoundries 22nm
The PLL5G250F is an ultra-low power phase locked loop (PLL) intellectual property (IP) block.
13-bit, 80 MSPS ADC - TSMC 65nm
The A13B80M is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block.
The FH-OFDM modem is developed for OFDM applications used in frequency hopping transmission scenarios or fixed frequency scenario…
The NAVIC BCH decoder is developed for satellite navigation applications.
The NR-5G Polar encoder/decoder is developed for 5G new radio.
12-bit ADC on Samsung 28nm LN28FDS
The ADC2859X is a 1.8V/1.1V dual supply-voltage 16-ch 12-bit analog-to-digital converter (ADC) with 3-ch S/H(sample and hold) tha…
SENT Protocol IP Core for Automotive Communication
The DSENT, a hardware implementation of the Single Edge Nibble Transmission (SENT) protocol controller.
USB 2.0 Human Interface Devices Design Platform
The USB 2.0 HID Design Platform is a , integrated solution, dedicated to a wide range of USB-based Human Interface Devices, like …
USB 2.0 Audio Devices Design Platform
The USB 2.0 Audio Design Platform is a , integrated solution, dedicated to USB-based Audio Devices, like microphones and speakers.
DVB-S2X Wideband LDPC/ BCH Encoder
The DVB-S2X Wideband LDPC BCH Encoder IP Core is developed for Digital Video Broadcasting applications.
Video Decoder - AV1, HEVC, AVC, VP9
WAVE6031 is a 4K multi-standard video decoder HW IP that supports AV1, HEVC/H.265, AVC/H.264, and VP9 video codec standard.
Fixed Point Doppler Channel IP core
The Doppler Channel IP is a Doppler shift frequency (DSF) generator capable of introduce a shift frequency to samples as a phase …
6GHz-12.5GHz PLL in GF 22nm FDX
Ultra-low jitter, low-power ring-oscillator-based PLL- 6GHz-12.5GHz in GF 22nm FDX
32G PHY in TSMC (N5A, N3A) for Automotive
The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high…
The multi-channel Synopsys PHY IP for PCI Express® 3.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’…
UCIe-A PHY for Advanced Package (x64) in Samsung (SF2)
Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data c…
UCIe-A PHY for Advanced Package (x64) in TSMC (N5)
Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data c…
UCIe-A PHY for Advanced Package (x64) in Samsung (SF4X)
Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data c…
UCIe based 8-bit 48-Gsps Transceiver (ADC/DAC/PLL/UCIe)
Unleash the power of the new UCIe based RF Chiplet transceiver.
UCIe based 12-bit 12-Gsps Transceiver (ADC/DAC/PLL/UCIe)
Unleash the power of the new UCIe based RF Chiplet transceiver.