With sophisticated architecture and technology, the Vendor provides DDR3 IP solution with high performance and low power.
- Controller
- DDR3
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
With sophisticated architecture and technology, the Vendor provides DDR3 IP solution with high performance and low power.
High-speed LVDS (Low-Voltage Differential Signaling) transceiver
This IP is a high-speed LVDS (Low-Voltage Differential Signaling) transceiver supporting multi-channel joint.
The DDR5 LRDIMM Verification IP provides an effective & efficient way to verify the components interfacing with DDR5 LRDIMM inter…
Xtal Oscillator on TSMC CLN7FF
High end consumer and professional applications require crystals with a minimum number of external components.
Wide Range Programmable Integer PLL on UMC L65LL
The Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multipli…
Wide Range Programmable Integer PLL on TSMC CLN80GC
The Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multipli…
Wide Range Programmable Integer PLL on TSMC CLN5A
The Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multipli…
Wide Range Programmable Integer PLL on TSMC CLN55GP
The Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multipli…
Wide Range Programmable Integer PLL on TSMC CLN3E
The Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multipli…
Wide Range Programmable Integer PLL on TSMC CLN2P
The Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multipli…
Wide Range Programmable Integer PLL on TSMC CLN16FFC
The Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multipli…
Programmable PCIe2/SATA3 SERDES PHY on TSMC CLN28HPC
The Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports…
Power Supply Glitch Detector on TSMC CLN3E
The Glitch Detector macro comprehensively addresses typical SOC power supply and other voltage glitch monitoring needs in a fully…
Power Supply Glitch Detector on TSMC CLN2P
The Glitch Detector macro comprehensively addresses typical SOC power supply and other voltage glitch monitoring needs in a fully…
Power Supply Droop Detector on TSMC CLN5
The Droop Detector macro addresses SOC power supply and other voltage droop monitoring needs in a fully integrated easy-to-use ma…
The Power-On Reset (POR) macro comprehensively addresses typical SOC start-up power supply monitoring needs, in a fully integrate…
PCIe Gen4/5/6 Class Low Jitter LC PLL on TSMC CLN2P
The PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express…
PCI Express Gen3 SERDES PHY on Samsung 7LPP
The Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS).
Multi Rail LDO for SERDES on TSMC CLN2P
The regulator macro addresses typical SOC power supply and other voltage regulation needs in a fully integrated easy-to-use macro.
Low Power Wide Range PLL on GLOBALFOUNDRIES 28SLP
The Low Power Wide Range PLL addresses markets and applications that demand very low power and optimized for area efficiencies.