Chipscope PLBv46 Integrated Bus Analyzer (IBA)
The ChipScope™ PLB IBA core is a specialized Bus Analyzer core designed to debug embedded systems that contain the IBM CoreConnec…
- Debug Trace
System peripheral IP cores are essential building blocks in modern SoC and ASIC designs, providing control, management, and support functions for the overall system operation.
This category includes a wide range of peripheral functions such as DMA controllers, interrupt controllers, monitoring and health management blocks, power management controllers, storage-related controllers, system controllers, and timers & watchdogs. These IP cores help coordinate data movement, system supervision, power optimization, fault detection, and overall platform management.
This catalog allows you to explore and compare system peripheral IP cores from leading vendors based on functionality, performance, power consumption, and process node compatibility.
Whether you are designing embedded systems, automotive platforms, or industrial controllers, you can find the right peripheral IP to support your system architecture.
Chipscope PLBv46 Integrated Bus Analyzer (IBA)
The ChipScope™ PLB IBA core is a specialized Bus Analyzer core designed to debug embedded systems that contain the IBM CoreConnec…
ChipScope Integrated Logic Analyzer (ILA)
The LogiCORE™ IP ChipScope™ Integrated Logic Analyzer (ILA) core is a customizable logic analyzer core that can be used to monito…
ChipScope Integrated Controller (ICON)
The LogiCORE® IP ChipScope Pro Integrated core (ICON) provides an interface between the JTAG Boundary Scan (BSCAN) interface of t…
The ChipScope PLB IBA core is a specialized Bus Analyzer core designed to debug embedded systems that contain the IBM CoreConnect…
The ChipScope OPB IBA core is a specialized Bus Analyzer core designed to debug embedded systems containing the IBM CoreConnect O…
Serial ATA Dual Host Controller
The LDS_SATA HOST DUAL XV5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA.
The LDS SATA HOST XV5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA.
DC motor controller - UMC 3.5um HV
Fully integrated DC motor controller ASIC featuring current limiter and thermal protection
Peripheral Interface Adapter (PIA)
The following information applies to both the Chip and Core versions of this 65xx brand microprocessor family member.
The datasheet provides the design specification for the MicroBlaze Debug Module (MDM).
The Local Memory Bus (LMB) Block RAM (BRAM) Interface Controller is a module that attaches to one LMB.
The Fixed Interval Timer (FIT) is a peripheral that generates a strobe signal at fixed intervals and is not attached to any bus.
The Xilinx LogiCORE™ Binary Counter IP core provides LUT and single DSP48 slice implementations.
Intel™ 8254 Programmable Counter/Timer Device
The IP-AL8254 core is the VHDL model of the Intel™ programmable counter/timer device designed for use as an Intel microcomputer p…
Intel™ 8279 Programmable Keyboard/Display Interface Device
The AL8279 core is the VHDL model of the Intel™ 8279 Programmable Keyboard/Display Interface device designed for use with Intel m…
Intel™ 8253 Programmable Counter/Timer Device
The IP-AL8253 core is the VHDL model of the Intel™ programmable counter/timer device designed for use as an Intel microcomputer p…
Intel™ 8243 Input/Output Expander
The IP-AL8243 core is the VHDL model of the Intel™ 8243 input/output expander.
Versatile Interface Adapter (VIA)
The following information applies to both the Chip and Core versions of this 65xx brand microprocessor family member.
Real-Time-Clock with Temperature Compensation - TSMC 40nm
Real-Time-Clock with Temperature Compensation - TSMC 40nm
UFS 3.0 is the next specification update pending from JEDEC.