MIPI TX CPHY_v1.0 / DPHY_v1.2, 3-TRIO/1C4D, TSMC 28HPC+, E/W orientation
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
MIPI RX CPHY_v2.0 / DPHY_v2.5, 3-TRIO/1C4D, TSMC N7A, 1.8V, E/W orientation(ASIL-B)
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
MIPI RX CPHY_v2.0 / DPHY_v2.5, 3-TRIO/1C4D, TSMC N5A, 1.2V, E/W orientation(ASIL-B)
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
MIPI RX CPHY_v2.0 / DPHY_v2.5, 3-TRIO/1C4D, TSMC 16FFC, E/W orientation(ASIL-B)
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
MIPI RX CPHY_v2.0 / DPHY_v2.5, 3-TRIO/1C4D, TSMC 12FFC, E/W orientation
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
MIPI RX CPHY_v1.2 / DPHY_v1.2, 3-TRIO/1C4D, TSMC 22ULL 1.8V, E/W orientation
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
MIPI RX CPHY_v1.2 / DPHY_v1.2, 3-TRIO/1C4D, TSMC 16FFC, E/W orientation
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
MIPI RX CPHY_v1.2 / DPHY_v1.2, 3-TRIO/1C4D, TSMC 12FFC, E/W orientation
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
MIPI RX CPHY_v1.0 / DPHY_v1.2, 3-TRIO/1C4D, TSMC 28HPC+, E/W orientation
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
PCIe Gen4 PHY, x1-lane, RC/EP, TSMC 16FFC, N/S orientation
The PCIe 4.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications.
PCIe Gen4 PHY, x4-lane, RC/EP, TSMC 16FFC, N/S orientation
The PCIe 4.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications.
PCIe Gen4 PHY, x1-lane, RC/EP, TSMC 12FFC, N/S orientation
The PCIe 4.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications.
PCIe Gen4 PHY, x4-lane, RC/EP, TSMC 12FFC, N/S orientation
The PCIe 4.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications.
PCIe Gen4 PHY, x2-lane, RC/EP, TSMC N7, 1.8V, N/S orientation
The PCIe 4.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications.
PCIe Gen4 PHY, x2-lane, RC/EP, TSMC N6, 1.8V, N/S orientation
The PCIe 4.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications.
PCIe Gen5/CXL combo PHY, x2-lane, RC/EP, TSMC 12FFC, N/S orientation
The PCIe 5.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications.
PCIe Gen5 PHY, x2-lane, RC/EP, TSMC 12FFC, N/S orientation
The PCIe 5.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications.
USB1.1 build-in clock PHY, TSMC 55ULP_EF
In USB product series, M31 not only provides customers with a standard USB PHY solution, but also offers a unique BCK function.
USB1.1 build-in clock PHY, TSMC 55ULP
In USB product series, M31 not only provides customers with a standard USB PHY solution, but also offers a unique BCK function.
USB2.0 build-in clock PHY, TSMC 55ULP_EF
In USB product series, M31 not only provides customers with a standard USB PHY solution, but also offers a unique BCK function.