RAR-eSR-qLR-ref-[1.62-3.63]-[0.55-2.5].04, as any Power Management Virtual Component designed by Dolphin Design, is readily retar…
- TSMC
- 40nm
- ULP eFlash
- Pre-Silicon
RAR-eSR-qLR-ref-[1.62-3.63]-[0.55-2.5].04, as any Power Management Virtual Component designed by Dolphin Design, is readily retar…
Linear Regulator, Low quiescent current
The qLR-Aubrey-ref-[1.62-3.63]-[1.2-3.3]-I0.3-Iq200.01 is an ultra-low-quiescent-current regulator used to generate SoC internal …
Linear regulator with ultra low quiescent current for retention applications
Linear regulator with ultra low quiescent current for retention applications
Combined Power On Reset and Brown Out Reset
Combined Power On Reset and Brown Out Reset
Over-voltage Protection Module to handle direct connection of voltage regulators to a 5V battery using standard IO devices
Linear Regulator for digital island
Linear Regulator to supply digital islands in TSMC 40nm uLP-eFlash
Low-BoM, inductor-based buck switching regulator with high efficiency, full PWM mode
Dolphin Design provides a Power Management IPs platform towards three objectives To standardize and ease Power Regulation Network…
Always-on Voice Activity Detection interfacing with analog microphones
The WT-a-HD.01 is a mixed analog/digital Virtual Component (ViC) containing a Voice Activity Detection (VAD) engine for ultra low…
24-bit Cap-less ADC 106 dB SNR low power and low latency 3 channels
The sADC-uLP-ANC.03 is a mixed (analog and digital) Virtual Component containing three mono ADCs, and additional functions offeri…
24-bit Cap-less ADC PLL-less 2 channels
The sADC-H1-LR.02 is a mixed (analog and digital) Virtual Component containing 2 mono ADCs, and additional functions offering an …
Ultra-low leakage I/O Library in TSMC 22nm
A TSMC 22nm Wirebond I/O Library with ultra-low leakage 1.8V GPIO, 1.8V I2C ODIO, 1.8V analog cell and associated ESD.
5V I/O and ESD in TSMC 12nm FFC/FFC+
A 5V Library for Generic I/O and ESD Applications TSMC 12NM FFC/FFC+ process.
180nm MTP Non Volatile Memory for Standard CMOS Logic Process
NSCore's TwinBit(TM) is the only embedded CMOS, multi-time programmable (MTP), non-volatile RAM IP of its kind, utilizing the 'ho…
The I2C library provides open-drain bi-directional I/O cells designed for the I2C two-line interface.
The CML library provides a differential current mode logic clock driver to support REFCLK signaling in PCIe applications along wi…
1.8V Programmable 100MHz Oscillator Staggered I/O Pad Set
The 1.8V 100MHz Oscillators library includes a programmable oscillator macro I/O cell.
The LPDDR2/3_DDR3/4 libraries contain the 7-way combo driver/receiver cells with embedded power cells, the driver impedance calib…
The ONFI 4.1 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage ref…
The 1.8V Fault-Tolerant General Purpose I/O library provides a 3.3V tolerant programmable, bidirectional I/O that give the system…
1.8V General Purpose I/O Inline Pad Set
The 1.8V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of power cells along …