I2C I/O Pad Set

The I2C library provides open-drain bi-directional I/O cells designed for the I2C two-line interface. It is compliant with the I2C-bus specification – UMC10204 I2C-bus specification and user manual, Rev.4 – 13 February 2012, NXP.

The design supports the Sm, Fm and Fm+ modes of operation at the I2C bus operating voltage (VDDP) of either extended range 3.3V or standard 1.8V logic.

These libraries are offered at both 16nm and a 12nm shrink. They
are available in a staggered CUP wire bond implementation with a flip chip option.

To utilize these cells in the pad ring, an additional library is required – 1.8V Support: Power. That library contains the power cells, the POC cell, and a rail splitter to isolate the I2C cells in their own power domain as recommended. It also contains an input-only buffer, isolated analog I/O, and a full complement of power cells along with corner and spacer cells to assemble a complete pad ring by abutment. The rail splitter allows multiple power domains to be isolated in the same pad ring while maintaining continuous VDD/VSS for robust ESD protection.

•  Supported I2C operating modes:
  • Standard-mode (Sm) – 100 Kbps data rate
  • Fast mode (Fm) – 400 Kbps data rate
  • Fast mode (Fm+) – 3.4 Mbps data rate
• Open drain operation only (floating NWELL with PMOS used for ESD protection only)
• Built-in output slew rate control to meet I2C Tof minimum of (20 x VDDP/5.5V) ns
• Output enable
• Receiver enable
• ESD protection is accomplished with an SCR (no diode to the positive power supply)
• Standard LVCMOS compatible inputs with Schmitt trigger (hysteresis) option
• Power-on sequencing independent design with Power-On Control
• DVDD = 1.62V to 1.98V
• Pad VDDP (power supply reference for Output)
  • 2.7V to 3.63V – extended range 3.3V
  • 1.62V to 1.98V – standard range 1.8V
• The circuit consumes no DC supply current in the static state
• An open-drain design, this cell requires an external pull-up resistor to a high voltage power supply. The pull-up power supply (VDDP) can be 3.63V maximum, independent of the I/O cell power supply (DVDD). In a 1.8V I2C bus application, VDDP can track DVDD but it is not necessary. The sizing of the external resistor is application dependent and can range from 1.1 K? to 40 K? operating at 3.3V.

• Physical abstract in LEF format (.lef)
• Timing models in Synopsys Liberty formats (.lib and .db)
• Calibre compatible LVS netlist in CDL format (.cdl)
• GDSII stream (.gds)
• Behavioral Verilog (.v)
• Layout Parasitic Extraction (LPE) SPICE netlist (.spice)
• Databook (.pdf)
• Library User Guide - ESD Guidelines (.pdf)