Single Port SRAM compiler - TSMC 180 nm G - Memory optimized for ultra low power and high density - Dual Voltage - compiler range…
- SRAM
- In_Production
Embedded memory IP cores are fundamental components in modern SoC and ASIC designs, providing fast and efficient on-chip data storage for processors, accelerators, and peripherals.
These IP cores encompass a broad range of volatile and non-volatile memory technologies, including SRAM for high-speed data storage, ROM for fixed program and boot code storage, register files for processor and accelerator architectures, as well as EEPROM, eFuse/OTP, and MTP (Multiple-Time Programmable) memories for configuration data, security credentials, device calibration, and permanent system information.
This catalog allows you to compare embedded memory IP cores from leading vendors based on density, access time, power consumption, and process node compatibility.
Whether you are designing high-performance processors, AI accelerators, automotive systems, or IoT devices, you can find the right embedded memory IP for your design.
Single Port SRAM compiler - TSMC 180 nm G - Memory optimized for ultra low power and high density - Dual Voltage - compiler range…
Foundry Sponsored - Single Port SRAM compiler - TSMC 180 nm eLL - Memory optimized for ultra low power and high density - Dual Vo…
Metal programmable ROM compiler - TSMC 180 nm eLL - Non volatile memory optimized for low power and high density - Dual Voltage -…
Metal programmable ROM compiler - TSMC 180 nm G - Non volatile memory optimized for low power and high density - Dual Voltage - c…
Metal programmable ROM compiler - TSMC 152 nm LP - Non volatile memory optimized for low power and high density - compiler range …
Metal programmable ROM compiler - TSMC 152 nm G - Non volatile memory optimized for low power and high density - Dual Voltage - c…
Metal programmable ROM compiler - TSMC 130 nm G - Non volatile memory optimized for low power - Dual Voltage - compiler range up …
VeriSilicon SMIC 0.18um LL Pro. Syn. VROM Compiler, Memory Array Range:128 to 2Mega Bits
VeriSilicon SMIC 0.18um Low Leakage Process Synchronous programmable Via1 ROM compiler optimized for Semiconductor Manufacturing …
VeriSilicon SMIC 0.18um LL Pro Syn. LP VROM Compiler, Memory Array Range:128 to 2Mega Bits
VeriSilicon SMIC 0.18um Low Leakage Process Synchronous Programmable Low Power Via1 ROM compiler optimized for Semiconductor Manu…
VeriSilicon SMIC 0.18um LL Pro Syn. LP DROM Compiler, Memory Array Range:128 to 2Mega Bits
VeriSilicon SMIC 0.18um Low Leakage Process Synchronous Low Power Diffusion ROM compiler optimized for Semiconductor Manufacturin…
VeriSilicon SMIC 0.13umLL 1P3M High-Density Synchronous Single-Port SRAM compiler optimized for Semiconductor Manufacturing Inter…
VeriSilicon SMIC 0.13um Synchronous programmable Via1 ROM compiler optimized for Semiconductor Manufacturing International Corpor…
VeriSilicon SMIC 0.13um Ultra-Low-Power Synchronous Single-Port SRAM compiler optimized for Semiconductor Manufacturing Internati…
VeriSilicon SMIC 0.13um High-Speed Synchronous Single-Port SRAM compiler optimized for Semiconductor Manufacturing International …
VeriSilicon SMIC 0.13um Syn. LP VROM Compiler, Memory Array Range:128 to 1Mega Bits
VeriSilicon SMIC 0.13um Synchronous programmable Low Power Via1 ROM compiler optimized for Semiconductor Manufacturing Internatio…
VeriSilicon SMIC 0.13um Syn. LP DROM Compiler, Memory Array Range:128 to 1Mega Bits
VeriSilicon SMIC 0.13um synchronous programmable Low Power diffusion ROM compiler optimized for Semiconductor Manufacturing Inter…
The AXI Streaming FIFO allows memory mapped access to a AXI Streaming interface.
The In System Flash (ISF) is type of serial flash memory and it is present only on the Spartan™-3AN devices.
This core allows memory mapped access to a LocalLink interface.
Xilinx provides a flexible Block Memory Generator core to create compact, high-performance memories running at up to 450 MHz The …