Narrow band - IoT Release-14 UE PHY. (L1) IP
This NB-IoT PHY.
- Channel Coding
- In Production
- immediate
- 3GPP
Compute and acceleration IP cores are specialized hardware blocks designed to improve performance and efficiency in modern SoC and ASIC designs.
This category covers a diverse ecosystem of processing technologies, including CPU and microcontroller cores for embedded control and software execution, AI/ML accelerators for neural network processing, DSP and math engines for real-time signal processing, data compression accelerators for efficient storage and communications, and eFPGA fabrics that provide post-silicon flexibility and hardware reconfigurability.
Whether you are designing for edge AI, automotive systems, consumer electronics, or data center acceleration, you can identify the right IP to optimize your system performance.
Narrow band - IoT Release-14 UE PHY. (L1) IP
This NB-IoT PHY.
Lattice's Viterbi Decoder is a parameterizable IP core with an efficient algorithm for decoding different combinations of convolu…
Crest factor reduction (CFR) selectively reduces the peak-to-average ratio (PAR) of wideband digital signals, such as those used …
FFT - Streaming Mixed-Radix Architecture
The FFT/IFFT IP core is a configurable Fast Fourier Transform (FFT) and Inverse Fast Fourier Transform (IFFT) VHDL IP component.
Zynq-7000 Processing System IP
Xilinx provides the Processing System IP Wrapper for the Zynq®-7000 to accelerate your design and its configuration for your embe…
Zynq UltraScale+ MPSoC Processing System IP
Xilinx provides the Processing System IP Wrapper for the Zynq UltraScale+ MPSoC to accelerate your design and its configuration f…
Xilinx provided utility function to simplify design in Vivado IP Integrator.
Xilinx provided utility function to simplify design in Vivado IP Integrator.
MicroBlaze Microcontroller Reference Design
MicroBlaze™ is a 32-bit RISC soft processor core that can be used with soft peripherals to design embedded systems in Xilinx FPGA…
Xilinx provided utility function to simplify design in Vivado IP Integrator.
Xilinx provided utility function to simplify design in Vivado IP Integrator.
50G IEEE 802.3 Reed-Solomon Forward Error Correction
Xilinx® offers the 50 Gigabit Reed-Solomon Forward Error Correction (RS-FEC) IP core for data center and enterprise applications.
The LTE PUCCH Receiver LogiCORE™ IP core provides the receive functionality required for the LTE Physical Uplink Control CHannel …
32G Fibre Channel (32GFC) Reed-Solomon Forward Error Correction
The Xilinx® LogiCORE™ 32G Fibre Channel (32GFC) RS-FEC IP core implements the Reed-Solomon Forward Error Correction (RS-FEC) subl…
IEEE 802.3bj Reed-Solomon Forward Error Correction
Xilinx® offers the 100 Gigabit IEEE 802.3bj Reed-Solomon Forward Error Correction (RS-FEC) IP core for data center and enterprise…
High performance 8-bit micro-controller with 256 bytes on-chip Data RAM, three 16-bit timer/counters, and two 16-bit dptr; 0.25um…
FT8032 0.25um shrink to 0.22um
FT8032 0.25um shrink to 0.22um
The Reed-Solomon Forward Error Correction (RS-FEC) IP Solution implements the RS-FEC sublayer specified in IEEE 802.3by/D3.1.
The Forward Error Correction (FEC) IP core is designed to comply with the Clause 74 (FEC sublayer for 10GBASE-R, 40GBASE-R, and 1…
TC1620 is a high performance turbo decdoer Core compliant with DVB-RCS2 specifications.