Discover DSP and Math IP for digital signal processing, arithmetic acceleration, and compute-intensive algorithms in semiconductor designs. This category includes IP cores optimized for filtering, transforms, vector processing, fixed-point and floating-point computation, and real-time signal manipulation.
Compare DSP and Math IP by processing architecture, supported numeric formats, throughput, latency, programmability, power efficiency, and target application. These IP solutions are widely used in communications, audio, vision, radar, industrial control, AI preprocessing, and embedded compute platforms.
512-bit Vector DSP IP, Dual Core with Functional Safety
The ASIL B and C compliant ARC® VPXxFS DSP IP is a family of VLIW/SIMD processors enabling automotive system-on-chip (SoC) design…
512-bit Vector DSP IP, Single Core
The ARC® VPX DSP IP is a family of VLIW/SIMD processors targeting a broad range of signal processing applications, from always-on…
512-bit Vector DSP IP, Quad Core
The ARC® VPX DSP IP is a family of VLIW/SIMD processors targeting a broad range of signal processing applications, from always-on…
512-bit Vector DSP IP, Dual Core
The ARC® VPX DSP IP is a family of VLIW/SIMD processors targeting a broad range of signal processing applications, from always-on…
256-bit Vector DSP IP, Single Core with Functional Safety
The ASIL B and C compliant ARC® VPXxFS DSP IP is a family of VLIW/SIMD processors enabling automotive system-on-chip (SoC) design…
256-bit Vector DSP IP, Single Core
The ARC® VPX DSP IP is a family of VLIW/SIMD processors targeting a broad range of signal processing applications, from always-on…
256-bit Vector DSP IP, Dual Core with Functional Safety
The ARC® VPX DSP IP is a family of VLIW/SIMD processors targeting a broad range of signal processing applications, from always-on…
256-bit Vector DSP IP, Dual Core
The ARC® VPX DSP IP is a family of VLIW/SIMD processors targeting a broad range of signal processing applications, from always-on…
128-bit Vector DSP IP, Single Core with Functional Safety
The ASIL B and C compliant ARC® VPXxFS DSP IP is a family of VLIW/SIMD processors enabling automotive system-on-chip (SoC) design…
128-bit Vector DSP IP, Single Core
The ARC® VPX DSP IP is a family of VLIW/SIMD processors targeting a broad range of signal processing applications, from always-on…
128-bit Vector DSP IP, Dual Core with Functional Safety
The ARC® VPX DSP IP is a family of VLIW/SIMD processors targeting a broad range of signal processing applications, from always-on…
128-bit Vector DSP IP, Dual Core
The ARC® VPX DSP IP is a family of VLIW/SIMD processors targeting a broad range of signal processing applications, from always-on…
Scalar and SIMD floating point option for the ARC HS5x, HS5xD and HS6x processors
The ARC® HS66 and HS68 processors feature a dual-issue, 64-bit superscalar architecture for use in embedded applications where hi…
The FastMath Pack is a math processing accelerator for the ARC HS family
The ARC® HS3x processors, which include the HS34, HS36 and HS38, are based on the -efficient ARCv2 instruction set architecture (…
BCH Encoder and Decoder IP Core
The IP Core implements BCH Code encoding and decoding.
An interpolating filter chain, numerically controlled oscillator, and mixer comprise the DUC.
FSK Demodulator,BCH Decoder,Command Decoder,Validator,Convolution Encoder IPs
A lot of development for implementing communication subsystem for a student nano-satellite was also undertaken.
The 8b10b line code is widely used to achieve DC-balance and bounded disparity when transmitting serial data over a medium.
Many digital systems use filters to remove noise, provide spectral shaping, or perform signal detection.
Reed-Solomon codes are used to perform Forward Error Correction (FEC).