Qualcore Successfully validates USB 2.0 PHY in TSMC 90nm Technology
Sunnyvale, Calif. -- October 6, 2010 - QualCore Logic, a leading provider of digital, mixed-signal and analog intellectual property (IP) for system-on-chip (SoC) designs, today announced that it successfully validated USB 2.0 PHY for US based company - the leading providers of high performance non-volatile solid state drives.
The USB PHY is functional as a Hi-Speed USB Host, Device or OTG PHY with UTMI+Level 3 Interface. The IP is proved in TSMC 90nm Technology
About QualCore Logic
QualCore Logic is the recognized leader of silicon-proven Analog, Mixed-signal and Digital intellectual property (IP) for system-on-chip (SoC) designs for the past 15 years. QualCore’s IP portfolio includes high performance PHYs (DDRs, SerDes etc.), ADCs, DACs, PLLs, DLLs, Special IO’s, Power Management Solutions and various Analog and Digital building blocks. With a large team of expert engineers, we provide best-in-class solutions in all the participating technology areas right from specification till GDSII. It operates design and support centers in Sunnyvale (California) and Hyderabad (India) with more than 50 design experts. Corporate headquarters is located at: 1289 Anvilwood Avenue, Sunnyvale, Calif. 94089. Web Site: http://www.qualcorelogic.com/
Related Semiconductor IP
- NPU IP
- JPEG XL Encoder
- I2C Master/Slave Controller Core
- NVMe Validation Test Suite
- Hybrid Memory Cube Verification IP
Related News
- Arasan refreshes its Total USB IP Solution with its next generation of USB 2.0 PHY IP
- Unveiling Silicon-proven USB 3.0 PHY IP Core in 22nm, Elevating High-Speed Data Transmission with Advanced Transceiver Technology, backward compatible with USB 2.0
- Introducing USB 3.0, PCIe 2.0 and SATA 3.0 Combo PHY IP Cores to empower Next Gen Connectivity Chipsets
- Synopsys' New USB 2.0 Type-C IP Cuts Power and Area for IoT Edge Applications
Latest News
- GF unveils roadmap to deliver the world’s most advanced FD-SOI platform for Physical AI
- GlobalFoundries marks Dresden expansion milestone, announces next-generation platform for Physical AI
- TSMC September 2026 Revenue Report
- Lattice Collaborates with Arm to Advance Secure, Adaptable AI Data Center Infrastructure
- ZLG Selects CAST CAN XL and TSN IP for Next-Generation Vehicle-Network Development and Test Tools