TSMC raises capex to record $8.5 billion, pulls in 20-nm
Peter Clarke, EETimes
(4/26/2012 12:23 PM EDT)
TSMC (Hsinchu, Taiwan) said that it needed to increase capex because of stronger than expected demand for 28-nm wafers and because it has decided to "pull in" the creation of a 20-nm R&D process line.
To read the full article, click here
Related Semiconductor IP
- Ultra-Low Latency 32Gbps SerDes IP in TSMC 12nm FFC
- Ultra-Low Latency 32Gbps SerDes IP in TSMC 22nm ULP
- 32Gbps SerDes IP in TSMC 12nm FFC
- 32Gbps SerDes IP in TSMC 22nm ULP
- MIPI D-PHY and FPD-Link (LVDS) Combinational Transmitter for TSMC 22nm ULP
Related News
- Chartered still losing money, cuts capex
- ST to 're-deploy' 1,000 engineers amid Q1 losses, CapEx cuts
- TSMC Announces Move to 20nm Process
- Expected Top Ten IC Industry Capex Spenders In 2010
Latest News
- JEDEC Advances DDR5 MRDIMM Ecosystem with New Memory Interface Logic and Expanded MRDIMM Roadmap
- Altera Brings Determinism to Physical AI Systems with Latest Release of FPGA AI Suite
- Mosaic SoC raises $3.8M to bring real-time spatial intelligence to every consumer device
- UMC Reports First Quarter 2026 Results
- Rambus Appoints Sumeet Gagneja as Chief Financial Officer