Tensilica vs. Ceva in imaging/vision IP core battle
Junko Yoshida, EETimes
2/12/2013 5:01 AM EST
NEW YORK--Rapidly evolving imaging and embedded vision algorithms are opening up a new battleground for DSP core IP companies in the high-performance and power-efficient imaging needs of mobile handsets, automotive and video products.
Following Ceva’s introduction a year ago of MM3101, a programmable, low-power imaging and vision platform, Tensilica Tuesday (Feb. 12) rolled out an imaging and video dataplane processor unit (DPU), called IVP.
To read the full article, click here
Related Semiconductor IP
- Vision 341 DSP
- Tensilica HiFi 3z DSP
- Tensilica HiFi 4 DSP
- High performance dual-issue, out-of-order, 7-stage Vector processor (DSP) IP
- Versatile, Ultra-Low-Power DSP for Audio, Voice, Vision, and AI
Related News
- Freescale vs. TI: Base station SoC battle
- Sensory TrulySecure Face Authentication Software Now Available on Cadence Tensilica Imaging/Vision DSPs
- Morpho's MovieSolid and Morpho Video WDR Now Available on Cadence Tensilica Imaging/Vision DSPs
- Cadence to Showcase Tensilica Audio, Imaging/Vision, and IoT DSPs and USB Type-C IP at CES 2016
Latest News
- Brite Semiconductor Releases 28nm High-Performance SAR ADC IP, Driving Upgrades for High-Speed Signal Chain Applications
- Synopsys Updates CXL IP Portfolio for AI-Era Infrastructure
- BrainChip Launches Symphony Community Akida Bundle For IBM’s Workload Management Solution
- StarIC Appoints Dr. Masum Hossain as Chief Technology Officer
- Andes Technology Empowers RISC-V Developers with Its New Streamlined IDE, RVBuilder