Space Codesign Systems Announces Support of Zynq UltraScale+ MPSoC
SpaceStudio FPGA-MPSoC development environment supports Xilinx Zynq UltraScale+ MPSoC.
MONTREAL -- June 10, 2019 -- Space Codesign Systems, a leading provider of an end-to-end automated solution from high-level application specification to physical board compilation, announces full system compilation for Xilinx Zynq UltraScale+ MPSoC. The new version of Space Codesign’s tool enables system designers to prototype on the whole range of the Zynq family.
The new generation of MPSoC integrates even more processing units. “There is an ARM A53, R5 and an FPGA fabric, the partitioning between hardware and software is even more difficult,” says Dr. Guy Bois, founder and president of Space Codesign Systems. “Our solution solves exactly this problem: finding the bottleneck in the application and optimizing the application with the right partitioning.”
SpaceStudio V3.3 provides a simulation environment to validate and predict performance of early-designed applications for MPSoC. SpaceStudio integrates monitoring and profiling capabilities to find the bottleneck, in terms of computation and calculation, in the application.
To learn how our unique design flow can target Xilinx UltraScale+ MPSoC, access our website and read more about the SpaceStudio solution or contact us directly about a specific inquiry.
About Space Codesign Systems
Space Codesign Systems Inc. is a technology transfer spin-out from Polytechnic Montreal, located in Montreal, Canada and Paris, France.
Space Codesign Systems is a software publisher whose flagship product, SpaceStudio, is a development environment for designers that eases the design flow of advanced algorithms targeting FPGA technology without the inherent complexity of FPGA. SpaceStudio covers the algorithm creation phase, algorithm and architecture optimization phase, and full system compilation for Xilinx and Intel FPGA.
Related Semiconductor IP
- I2C Master/Slave Controller Core
- NVMe Validation Test Suite
- Hybrid Memory Cube Verification IP
- nQrux® Root of Trust IP
- AXI to UCIe Bridge IP
Related News
- New Integration Between SpaceStudio Hardware Software Co-design and European Space Agency’s TASTE Tool Set
- SpaceStudio Hardware Software Codesign Tool Expands Offering to New SoC Design Markets
- Xilinx and Its Expanded Ecosystem Showcase the Latest 16nm Zynq UltraScale+ MPSoC Technologies at Embedded World 2016
- Xilinx Extends SDSoC Development Environment, Enabling Software Defined Programming of the 16nm Zynq Ultrascale+ MPSoC
Latest News
- Vayavya Labs and Tenstorrent Partner to Accelerate RISC-V Hardware and Software Development Through Virtual Platform Modeling
- RaiderChip’s Edge NPU reaches more than 50 Generative AI Models with the addition of Qwen3.8-27B
- Aion Silicon Named Design Solution Associate in New Rapidus CORE Ecosystem for 2nm Semiconductors
- Arteris Wins Funding to Expand Hardware Design Supply Chain Security Assurance for the Trusted and Assured Microelectronics Program
- UMC Reports Sales for September 2026