Rambus Comments on Order in Price-Fixing Case
LOS ALTOS, Calif.-- November 23, 2009 -- Rambus Inc. today announced that Judge Richard A. Kramer of the San Francisco Superior Court has issued recommendations that the Rambus antitrust case against certain memory manufacturers and the Tessera Technologies antitrust case against Hynix be coordinated and assigned to the San Francisco Superior Court.
âAt the hearing regarding coordination on November 6, 2009, Judge Kramer made clear that he would recommend coordination so long as it does not delay the commencement of the Rambus antitrust jury trial on January 11, 2010,â said Thomas Lavelle, senior vice president and general counsel of Rambus. âConsistent with those statements, we are preparing to start our trial in January and we look forward to confirmation from Judge Kramer when he returns to court next week.â
The Rambus case before the Honorable Judge Kramer was filed in 2004 alleging defendants Hynix, Micron and Samsung engaged in a concerted and unlawful effort to eliminate competition and stifle innovation in the market for computer memory technology and computer memory chips.
Additional information on this and other cases can be found at www.rambus.com/investor, under the Litigation Update section.
About Rambus Inc.
Rambus is one of the world's premier technology licensing companies specializing in the invention and design of high-speed memory architectures. Since its founding in 1990, the Company's patented innovations, breakthrough technologies and renowned integration expertise have helped industry-leading chip and system companies bring superior products to market. Rambusâ innovations and solutions enable unprecedented performance in computing, communications, and consumer electronics applications. Rambus licenses both its world-class patent portfolio as well as a range of leadership and industry-standard memory solutions. Headquartered in Los Altos, California, Rambus has regional offices in North Carolina, India, Germany, Japan, and Taiwan. Additional information is available at www.rambus.com.
Related Semiconductor IP
- NPU IP
- JPEG XL Encoder
- I2C Master/Slave Controller Core
- NVMe Validation Test Suite
- Hybrid Memory Cube Verification IP
Related News
- Rambus and Micron Extend Patent License Agreement
- Rambus Advances HBM2E Performance to 4.0 Gbps for AI/ML Training Applications
- Rambus IPsec Packet Engine Secures 5G Networking at 10 Gbps
- Rambus Announces New Stock Repurchase Program
Latest News
- intoPIX to Demonstrate JPEG XS, IPMX and SMPTE ST 2110 Solutions at NAB Show New York 2026
- GF unveils roadmap to deliver the world’s most advanced FD-SOI platform for Physical AI
- GlobalFoundries marks Dresden expansion milestone, announces next-generation platform for Physical AI
- TSMC September 2026 Revenue Report
- Lattice Collaborates with Arm to Advance Secure, Adaptable AI Data Center Infrastructure