IC Manage Releases Global Design Management Survey Results
April 29, 2009 – Los Gatos, CA
– IC Manage, Inc. today announced the availability of its “Global IC Design Management Report” covering the results of a 412 respondent survey of IC design professionals.
IC Manage’s Global Design Management report can be read at: http://icmanage.com/globalDMreport09.pdf. The report covers the following findings from its industry-wide March 2009 global survey, along with an ROI impact summary:
- IC Design Management implementation plans for 2009
- Designers’ time spent on design management issues
- Design Management issues’ impact on project deadlines and tapeouts
- Primary justifications for implementing an IC Design Management system
- Major Obstacles to Deploying a Design Management system
“42% of CAD managers indicate their organizations have missed project or tapeout deadlines due to Design Management issues,” said Dennis Harmon, Vice President of Business Development at IC Manage. “Based on this finding, the right design management system will have an enormous financial impact, especially in today’s unforgiving economic climate.”
About IC Manage
IC Manage, Inc. provides next generation design management solutions for IC design, enabling companies to efficiently and reliably manage single and multi-site design efforts. IC Manage's Global Design Platform (GDP) – utilizing the Perforce engine – is the first solution to offer design assembly, derivative management and content delivery in addition to scalable, ultra performance revision control, release and configuration management. IC Manage offers IT infrastructure integration for hot backup, high availability and disaster recovery for true 24x7 enterprise availability. IC Manage is headquartered at Suite 100, 15729 Los Gatos Blvd, Los Gatos, CA 95032. For more information, visit us at www.icmanage.com.
Related Semiconductor IP
- ONFI/Toggle IP
- 8 - 24MHz Xtal Oscillator on TSMC 22nm
- 32kHz Xtal Oscillator on TSMC 22nm
- 1.056GHz SSCG PLL on TSMC 40nm
- 1.25GHz Multiplying PLL on TSMC 40nm
Related News
- IC Manage GDP-XL Enterprise IP Catalog enables NXP to Improve IP Asset Management and Reuse
- IC Manage Advances GDP-AI for Custom IC Design with Virtuoso
- IC Manage GDP-AI Transforms IP Lifecycle Management with Generative and Agentic AI
- IC Manage Partners with Library Technologies to Accelerate Library Characterization by 100x in the Cloud
Latest News
- SiFive Paves the Path to Accelerated Adoption of RISC-V in the Datacenter with the BigSky Development Server
- Perceptia Releases Design Kit for pPLL03 on Samsung Foundry 14LPU Platform
- Brite Semiconductor Releases 28nm High-Performance SAR ADC IP, Driving Upgrades for High-Speed Signal Chain Applications
- Synopsys Updates CXL IP Portfolio for AI-Era Infrastructure
- BrainChip Launches Symphony Community Akida Bundle For IBM’s Workload Management Solution