Dolphin Integration promotes a design methodology ensuring High-Yield circuits despite Mismatch
Meylan, France – December 4th, 2009. As the promoter of innovative Virtual Components of Silicon IP and methodologies for the Microelectronics Design Industry, Dolphin Integration takes the responsibility of setting up a method enabling the assessment of design yield for any memory generator.
Traditional simulations based on worst-case corners (process, temperature, voltage) do not allow measuring the negative impact of the performance variations of transistors due to the dispersion between transistors on the same circuit.
To take into consideration such Mismatch effects, Monte Carlo simulations are required, resulting in a huge amount of computer time. For a memory generator, simplifications of models are necessary, but must result in a safe design. In any case, what is missing is a standard method for assessing the design yield of a memory during simulation and specifications based on clear acceptance criteria.
Design yield can only be guaranteed by a combination of worst-case corners simulation and mismatch simulation. The embedded Memory Provider has built a two steps methodology to take into account the offset for the design and the validation of any memory generator, with the objective of achieving high design yield while maintaining optimized performances. The Dolphin method enables both an a-posteriori verification of mismatch and an a-priori implementation during the memory design.
SoC designers can benefit from both Dolphin Integration’s design methodology and an overall catalog of Static RAM and Via-Programmable ROM satisfying the expectations of most of consumer and industrial applications.
For more information about Dolphin Integration’s offering: http://www.dolphin.fr/flip/ragtime/ragtime_download.html
About Dolphin Integration
Dolphin Integration is up to their charter as the most adaptive creator in the Microelectronics Design Industry to "enable mixed signal Systems-on-Chip". It stars a quality management stimulating reactivity for innovation and Foundry independence. Their current mission is to supply worldwide customers with fault-free, high-yield and reliable sets of CMOS Virtual Components, resilient to noise and drastic for low power-consumption, together with engineering assistance and product evolutions customized to their needs.
For more information about Dolphin, visit www.dolphin.fr/ragtime
Related Semiconductor IP
- ONFI/Toggle IP
- 8 - 24MHz Xtal Oscillator on TSMC 22nm
- 32kHz Xtal Oscillator on TSMC 22nm
- 1.056GHz SSCG PLL on TSMC 40nm
- 1.25GHz Multiplying PLL on TSMC 40nm
Related News
- Chartered, Flextronics post losses despite higher sales
- 1394 finding design-ins despite competition, says report
- Devices must function despite defects, says panel
- LogicVision and Dolphin Technology Join Forces to Deliver Industry's Most Advanced High-Yield Embedded Memory Solution
Latest News
- SiFive Paves the Path to Accelerated Adoption of RISC-V in the Datacenter with the BigSky Development Server
- Perceptia Releases Design Kit for pPLL03 on Samsung Foundry 14LPU Platform
- Brite Semiconductor Releases 28nm High-Performance SAR ADC IP, Driving Upgrades for High-Speed Signal Chain Applications
- Synopsys Updates CXL IP Portfolio for AI-Era Infrastructure
- BrainChip Launches Symphony Community Akida Bundle For IBM’s Workload Management Solution