Commentary: Why it's time to redefine ESL
By Steve Glaser, Cadence Design Systems
Nov 3 2006 (13:48 PM), Courtesy of EE Times
Electronic system level (ESL) has frequently been characterized as the new frontier in the EDA industry as we move to higher levels of abstraction and advanced automation. However, there have been few companies able to deliver solutions that offer the ease of adoption, robustness, and measurable value necessary to support a sustained, profitable business. This is mostly because the ESL "definition" itself has remained ambiguous, causing many to wonder — what really is ESL and will it ever deliver on its promises?
Most of what is thought of as traditional ESL is design-centric. Current solutions are targeted to C-based systems designers, and are isolated from those driving the functional verification process, enforcing the system specifications across the entire project at block, chip and system levels.
As a result, today's narrow and isolated ESL "solutions" end up missing the mark, resulting in more questions than answers. So we are left with a user community unable to embrace the vast potential and visibility of ESL within the EDA industry.
What if system-level design solutions were not isolated from the rest of the design and verification activities? Should the ESL market definition include newer system-level verification solutions? Should software integration and verification be part of ESL, even if it doesn't use C-level models?
Should systems integration and verification towards the end of the design process be considered a necessary part of an ESL solution? Is hardware emulation considered part of ESL, since 80 percent of its users are verifying software and systems with it? Is system-level really about system-level abstractions or system-wide scope? Maybe the ESL definition should be revisited.
To read the full article, click here
Related Semiconductor IP
- Band-Gap Voltage Reference with dual 2µA Current Source - X-FAB XT018
- 250nA-88μA Current Reference - X-FAB XT018-0.18μm BCD-on-SOI CMOS
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
- 16-Bit xSPI PSRAM PHY
Related News
- Commentary: Why we don't have IP quality yet (by Larry Cooke, VSI)
- The IP double standard: Why is it OK to pay for innovation in a product, but not when innovation is the product?
- Commentary: ESL success demands outsourcing
- Commentary: How ESL can regain credibility
Latest News
- SEMI Reports Worldwide Silicon Wafer Shipments Increase 13% Year-on-Year in Q1 2026
- POLYN Technology Announces Tapeout of Automotive Chip
- QuickLogic Establishes New Banking Relationship and Secures $10 Million Revolving Credit Facility
- TES is extending its PMU IP portfolio for X-FAB’s XT018 - 0.18µm BCD-on-SOI technology.
- RF Front-End Modules & Components IP Trends – Q1 2026 Monitoring Release