Cadence C-to-Silicon Compiler Helps Renesas Realize Quick HEVC IP Development
SAN JOSE, Calif., 14 Jan 2014 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that Renesas Electronics Corporation shortened its design and verification time by 70 percent by utilizing Cadence® C-to-Silicon Compiler to develop High Efficiency Video Coding (HEVC) intellectual property (IP), targeting consumer 4K video devices. This enabled the company to quickly offer their customers IP supporting this next-generation video codec.
Renesas established its own coding style and reduced code size by almost half with SystemC to create the HEVC IP at a high level of abstraction. This enabled verification times that were six times faster than register-transfer level (RTL). This approach also enabled Renesas to use C-to-Silicon Compiler to explore many algorithmic implementations to generate high-performance RTL while minimizing power consumption and chip area. To eliminate any potential schedule impact from a significant engineering change order (ECO) late in the project, Renesas developed an ECO flow utilizing C-to-Silicon Compiler with Encounter® Conformal® ECO Designer. This allowed them to use high-level synthesis to quickly apply and verify a patch to stay on schedule.
“The challenge with developing this HEVC/H.265-compliant IP was to incorporate our proprietary new algorithm, which enables high quality and high compression efficiently,” said Toyokazu Hori, department manager of Platform Base Technology Development Department, Automotive Information System Business Division at Renesas Electronics Corporation. “Deploying the system-level design approach with C-to-Silicon Compiler for the entire design addressed this challenge and we were able to implement the new algorithm very efficiently, achieving a good time-to-market for our advanced new IP.”
For more information on C-to-Silicon Compiler, visit www.cadence.com/news/ctosilicon.
For more information on the Renesas HEVC IP, visit www.renesas.com/press/news/2013a/news20131029.jsp.
About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.
Related Semiconductor IP
- 4K, 4:2:0/4:2:2:/4:4:4, 8/10/12 bit HEVC Decoder
- H.265 HEVC Decoder
- Video CODEC - AV1, HEVC, AVC, VP9 (VP9: Decoder only)
- Video Decoder - AV1, HEVC, AVC, VP9
- HEVC 4Kp60 Decoder, Supports 4:2:2, 10-bit decoding and 150Mbps bitrate
Related News
- Synopsys' Design Compiler Graphical Adopted by Renesas for Automotive ICs
- Synopsys' Fusion Compiler Enables Renesas to Accelerate Delivery of Next-Generation Automotive Designs
- Cadence Unveils Palladium Z3 and Protium X3 Systems to Usher in a New Era of Accelerated Verification, Software Development and Digital Twins
- Semiwise, sureCore, and Cadence Showcase Breakthrough in Cryogenic CMOS Circuit Development for Quantum Computing and Energy-Efficient Data Centers
Latest News
- GF unveils roadmap to deliver the world’s most advanced FD-SOI platform for Physical AI
- GlobalFoundries marks Dresden expansion milestone, announces next-generation platform for Physical AI
- TSMC September 2026 Revenue Report
- Lattice Collaborates with Arm to Advance Secure, Adaptable AI Data Center Infrastructure
- ZLG Selects CAST CAN XL and TSN IP for Next-Generation Vehicle-Network Development and Test Tools