Aldec Extends Spectrum of Verification Tools for Use in Digital ASIC Designs
2016-05-17 03:29:00
EDA & Design Tools
Semiconductor IP News Archive - Page 636 of 1948
Uurmi Fog Removal Software Now Available on Cadence Tensilica Vision DSPs
2016-05-16 17:14:00
SoC Architecture & Assembly
Five Months into the Year and Market Finally Reaching Bottom; IDC Forecasts Worldwide Semiconductor Revenue Still to Fall 2.3% to $324 Billion
2016-05-16 13:16:00
Analysis & Insight
UltraSoC announces significant product update, improved support for analytics and "any CPU" capability
2016-05-16 13:06:00
EDA & Design Tools
Truechip announces first customer shipment of CPRI Comprehensive Verification IP (CVIP)
2016-05-16 08:28:00
Verification IP
Lattice Announces First Programmable ASSP (pASSP) Interface Bridge for Mobile Image Sensors and Displays
2016-05-16 03:46:00
SoC Architecture & Assembly
Seven Top-20 1Q16 Semiconductor Suppliers Show Double-Digit Declines
2016-05-13 15:46:00
Analysis & Insight
Moortec to exhibit at next week's TSMC China Technology Symposium
2016-05-13 15:40:00
Misc
Sidense Exhibiting Secure and Reliable 1T-OTP at TSMC 2016 China and Taiwan Symposiums
2016-05-12 17:05:00
Misc
Istuary Innovation Group Selects Agnisys IDesignSpec for Enterprise Storage Chips
2016-05-12 16:51:00
EDA & Design Tools
SMIC Reports 2016 First Quarter Results
2016-05-12 15:49:00
Financials
VeriSilicon Supports the Connected Car by Joining Automotive Grade Linux
2016-05-12 15:20:00
Misc
Synopsys Expands Portfolio of ARC Processors for Safety-Critical Automotive Applications to Include DSP and Cache Support
2016-05-11 15:06:00
IP Cores & Design
Algo-Logic Systems Launches FPGA Accelerated CME Tick-To-Trade System
2016-05-11 11:21:00
SoC Architecture & Assembly
VORAGO Technologies Announces Availability of Industry's First ARM Cortex MCUs Built for Extreme Conditions
2016-05-11 09:41:00
SoC Architecture & Assembly
ARM University Program Introduces New Mobile Gaming Education Kit
2016-05-11 08:39:00
Misc
Barco Silex launches flexible eSecure IP module as cornerstone for fully-secured IoT applications
2016-05-10 19:15:00
IP Cores & Design
Cypress Adopts Cadence Digital Implementation and Circuit Simulation Tools for 40nm Automotive Designs
2016-05-10 17:17:00
EDA & Design Tools
Synopsys Verification Solution Certified for the Most Stringent Level of Automotive Safety Measures Defined by the ISO 26262 Standard
2016-05-10 15:20:00
EDA & Design Tools
HDL Design House Appoints New Representative for Central Europe, Nordic Region and the US
2016-05-10 10:26:00
Strategic Partnerships