Agnisys and Breker Partner to Generate System-Level Portable Stimulus Sequences
2016-05-25 09:04:00
EDA & Design Tools
Semiconductor IP News Archive - Page 634 of 1948
Imec and Holst Centre Present Multi-Standard Low-Power Wide-Area Radio Chip
2016-05-25 08:56:00
SoC Architecture & Assembly
Alizem releases new Safe Engine Stop-Start Software IP to improve energy-efficiency of delivery vehicles
2016-05-24 17:48:00
SoC Architecture & Assembly
ARM Cortex-A72 Models and Virtual Platforms Released by Imperas and Open Virtual Platforms
2016-05-24 17:05:00
EDA & Design Tools
Agnisys Expands Product Portfolio With Portable Sequence Generator
2016-05-24 16:37:00
EDA & Design Tools
Synopsys Delivers Industry's First Cache Coherent Subsystem Verification Solution for Arteris Ncore Interconnect
2016-05-24 15:13:00
Verification IP
Foundries' Sales Show Hard Times Continuing
2016-05-24 15:03:00
Analysis & Insight
Innosilicon Announces that the world 1st 14nm A4 Dominator ASIC is ready for mass shipment in 2 months
2016-05-24 10:56:00
SoC Architecture & Assembly
Synopsys Completes Acquisition of Gold Standard Simulations
2016-05-24 10:54:00
Strategic Partnerships
Synopsys Launches Pre-Wafer Simulation Solution to Reduce Semiconductor Process Development Time
2016-05-24 10:52:00
EDA & Design Tools
Arteris Ncore Cache Coherent Interconnect IP is Implemented by NXP
2016-05-24 10:36:00
Commercial Deals
Analogix Licenses USB-C Technology to LG Electronics
2016-05-24 04:29:00
Commercial Deals
GLOBALFOUNDRIES Releases Performance-Enhanced 130nm SiGe RF Technology to Advance Next Generation Wireless Network Communications
2016-05-23 16:06:00
Foundries & Process Nodes
Palma Ceia SemiDesign Tapes Out 802.11ax Analog Frontend for Next-Generation Access Points
2016-05-23 14:32:00
IP Cores & Design
Accelerators Unite ARM, IBM, X86
2016-05-23 13:54:00
Analysis & Insight
Technology Leaders Join Forces to Bring an Open Acceleration Framework to Data Centers and Other Markets
2016-05-23 13:48:00
Strategic Partnerships
Xilinx Expands its 16nm UltraScale+ Product Roadmap to Include Acceleration Enhanced Technologies for the Data Center
2016-05-23 13:44:00
SoC Architecture & Assembly
Semiconductor Merger Mania: A Change From Historical Norms?
2016-05-23 11:16:00
Analysis & Insight
eMemory NeoFuse IP Qualified in 40nm EHV Process
2016-05-23 09:12:00
IP Cores & Design
AMPHION targets DAC 2016 to demonstrate compact HEVC/H.265 hardware decoder IP using H.265 bitstreams from encoder IP innovator NGCodec
2016-05-23 08:29:00
Misc