Arteris Adds Support for ARM AMBA 5 AHB5 Protocol
ARM TechCon 2016, SANTA CLARA, Calif. — Oct. 25, 2016 — Arteris Inc., the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that it has implemented ARM® AMBA® 5 Advanced High-Performance Bus 5 (AHB5) protocol support in its FlexNoC Interconnect IP and Ncore Interconnect IP products.
The AHB5 specification is an update to the previous ARM AMBA 3 AHB specification. It provides support for the ARMv8-M architecture, adding features that extend ARM TrustZone® technology support throughout the SoC.
“ARM and its rich ecosystem enable rapid deployment of complete solutions for secure smart embedded devices and accelerating delivery to market,” said Nandan Nayampally, vice president of marketing and strategy, CPU group, ARM. “Arteris’ support of AHB5 is another demonstration of how ARM’s ecosystem helps to simplify and foster the development of secure Internet of Things devices.”
“Arteris has been an enthusiastic supporter of ARM AMBA specifications since our inception, implementing the ARM AMBA 3, 4 and 5 specifications within our interconnect IP products,” said K. Charles Janac, President and CEO of Arteris. “We are strongly committed to supporting the advancement of ARM interconnect standards on a long-term basis to enable semiconductor design teams to more easily create SoCs using IP from the ARM ecosystem.”
About Arteris
Arteris, Inc. provides system-on-chip (SoC) interconnect IP and tools to accelerate SoC semiconductor assembly for a wide range of applications. Rapid semiconductor designer adoption by customers such as Samsung, Huawei / Hisilicon, Mobileye, Altera, and Texas Instruments has resulted in Arteris being the only semiconductor IP company to be ranked in the Inc. 500 and Deloitte Technology Fast 500 lists in 2012 and 2013. Customer results obtained by using the Arteris product line include lower power, higher performance, more efficient design reuse and faster SoC development, leading to lower development and production costs. More information can be found at www.arteris.com.
Related Semiconductor IP
- 1.6T Ultra Ethernet Controller
- Chiplet Die-to-Die Interconnect IP Solution
- High speed MACsec Engine 100G/200G/400G/800G/1.6T
- Temperature/Voltage sensors
- AMBA Bus Host to eSPI Controller/Target
Related News
- Cadence Announces Verification IP for ARM AMBA 5 AHB5
- Silistix Self-Timed Interconnect Solution Supports AMBA Bus Protocol
- Sonics Offers Free Evaluation for Designers of Sonics Network for AMBA Protocol Solution
- Sonics Network for AMBA Protocol Now Available for Windows
Latest News
- Alliance for Open Media Releases AV2 Codec, Advancing Next-Generation Open Video Coding
- VeriSilicon Drives Commercial Adoption of AV2 Across Next-Generation Video and Streaming Applications
- Cadence Announces Collaboration with Intel Foundry to Accelerate Intel 14A Process Optimization for HPC and Mobile Designs
- Menta and Presto Engineering Announce Strategic Collaboration to Accelerate Adaptive ASIC Architectures with Embedded FPGA Technology
- MIPI A-PHY To Power Industry’s First Four-Company Automotive SerDes Interoperability Demonstration at AutoSens USA