The TekStart Group Enters into Distribution Agreement with Techno Mathematical to Promote Advanced Hardware and Software CODEC Solutions
2025-07-22 14:20:00
Strategic Partnerships
Semiconductor IP News Archive - Page 62 of 1964
Alchip Introduces 2nm Design Platform
2025-07-22 14:08:00
IP Cores & Design
Arteris Selected by Whalechip for Near-Memory Computing Chip
2025-07-22 13:05:00
Commercial Deals
Inside Cyient Semiconductors Bet on RISC-V for Custom Silicon
2025-07-22 10:38:00
Analysis & Insight
Faraday Delivers DDR/LPDDR Combo PHY IP Solutions on UMC's 22ULP and 14FFC
2025-07-22 08:42:00
IP Cores & Design
EnSilica cuts post-quantum cryptography (PQC) silicon area with three-in-one IP block
2025-07-21 11:26:00
IP Cores & Design
Perceptia Devices Release pPLL08W, best-in-class RF PLL IP in GF22FDX
2025-07-21 10:27:00
IP Cores & Design
Axiomise Partners With Bluespec to Verify Its RISC-V Cores
2025-07-20 18:43:00
EDA & Design Tools
Rapidus Achieves Significant Milestone at its State-of-the-Art Foundry with Prototyping of Leading-Edge 2nm GAA Transistors
2025-07-20 05:31:00
Foundries & Process Nodes
SEMIFIVE Files for Pre-IPO Review on KRX
2025-07-18 11:39:00
Strategic Partnerships
Innosilicon Scales LPDDR5X/5/4X/4 and DDR5/4 Combo IPs to 28nm and 22nm, Cementing Its Position as the ‘One Stop’ for Memory Interface Solutions
2025-07-18 04:15:00
IP Cores & Design
Synopsys Completes Acquisition of Ansys
2025-07-17 13:13:00
Strategic Partnerships
Zephyr 4.0 Now Available for SCR RISC-V IP
2025-07-17 12:05:00
SoC Architecture & Assembly
Lattice Semiconductor and Missing Link Electronics Become Partners to Accelerate FPGA Design Projects
2025-07-17 11:35:00
Strategic Partnerships
TSMC Reports Second Quarter EPS of NT$15.36
2025-07-17 11:23:00
Financials
SiPearl Tapes Out Rhea1 Processor, Closes Series A, Preps Series B
2025-07-16 12:39:00
Analysis & Insight
Thalia Design Automation launches AMALIA Platform 25.2
2025-07-16 09:12:00
EDA & Design Tools
Siemens’ Veloce CS selected by Arm for Neoverse Compute Subsystems verification and validation
2025-07-15 23:24:00
EDA & Design Tools
InPsytech Tapes Out F2F SoIC Design Compliant with UCIE 2.0 Standard Enabling High-Speed Interconnects for 3D Heterogeneous Integration
2025-07-15 16:18:00
IP Cores & Design
ESD Alliance Reports Electronic System Design Industry Posts $5.1 Billion in Revenue in Q1 2025
2025-07-15 14:22:00
Analysis & Insight