Analog Bits Adds New Power and Energy Management IP Blocks Proven on TSMC N2P and N3P Processes at TSMC 2025 OIP Ecosystem Forum
2025-09-22 15:14:00
IP Cores & Design
Semiconductor IP News Archive - Page 45 of 1956
EnSilica and Codasip announce strategic partnership
2025-09-22 13:23:00
Strategic Partnerships
Empower Semiconductor Secures Over $140M in Series D Financing
2025-09-22 13:05:00
Strategic Partnerships
Siemens unveils groundbreaking Tessent AnalogTest software for automated analog circuit test generation
2025-09-22 12:51:00
EDA & Design Tools
Euclyd Unveils CRAFTWERK: The World’s Most Power-Efficient Exascale Token Factory for Agentic AI
2025-09-22 07:31:00
SoC Architecture & Assembly
NVMe Aims For Annual Spec Updates
2025-09-22 07:07:00
Analysis & Insight
MIPS Appoints Alan Li as Head of Business Development to Accelerate China Growth
2025-09-22 05:46:00
People & Leadership
BrainChip Expands Global Reach, Announces Akida Boards and AI Development Kits Available at DigiKey
2025-09-19 05:27:00
SoC Architecture & Assembly
Qualitas Semiconductor Successfully Demonstrates Live UCIe PHY IP at AI Infra Summit 2025
2025-09-18 12:50:00
IP Cores & Design
Silicon Creations Announces 1000th Production FinFET Tapeout at TSMC and Immediate Availability of Full IP Library on TSMC N2 Technology
2025-09-18 12:30:00
Strategic Partnerships
Intel and NVIDIA to Jointly Develop AI Infrastructure and Personal Computing Products
2025-09-18 11:29:00
Strategic Partnerships
Comcores MACsec IP is compliant with the OPEN Alliance Standard
2025-09-18 10:36:00
IP Cores & Design
Sofics joins GlobalFoundries’ GlobalSolutions Ecosystem to Enhance Chip Robustness, Performance and Design Efficiency
2025-09-18 08:35:00
Strategic Partnerships
Presto Engineering Tapes Out 2 Macro IPs with X-FAB for Low-Power and High-Precision Sensing Applications
2025-09-18 06:01:00
IP Cores & Design
Zero ASIC releases Wildebeest, the world’s highest performance FPGA synthesis tool
2025-09-18 05:47:00
EDA & Design Tools
2025 TSMC OIP Ecosystem Forum Highlights Aion Silicon’s Leadership in Advanced SoC Design
2025-09-17 15:26:00
Events & Conferences
Ceva Appoints Former Microsoft AI and Hardware Leader Yaron Galitzky to Accelerate Ceva’s AI Strategy and Innovation at the Smart Edge
2025-09-17 11:28:00
People & Leadership
Dnotitia Unveils VDPU IP, the First Accelerator IP for Vector Database
2025-09-17 09:54:00
IP Cores & Design
Ambient Scientific AI-native processor for edge applications offers 100x power and performance improvements over 32-bit MCUs
2025-09-17 08:53:00
SoC Architecture & Assembly
Qualitas Semiconductor Signs PCIe Gen 4.0 PHY IP License Agreement with Leading Chinese Fabless Customer
2025-09-17 08:20:00
Strategic Partnerships