TES offers PKCS IP Core for System-on-Chip (SoC) Designs
January 26, 2026 -- TES Electronic Solutions GmbH adds to its IP portfolio a new VHDL-based PKCS (Public-Key Cryptography) IP core. The IP is designed for System-on-Chip (SoC) implementations and can be integrated into a wide range of applications and target technologies. It supports both ASIC and FPGA designs.
Key Benefits
Comprehensive implementation in accordance with RSA Laboratories' Public-Key Cryptography Standards (PKCS) series, PKCS #5 v2.0.- Support of SHA256 algorithm.
- Optimized for minimal area, low power consumption, and reduced computation time.
- Simple external interface for easy adaptation.
- First-Class Support as TES will make supporting your design effort a priority – whether it is integrating this IP into your design or implementing a complete ASIC.
Explore PKCS IP:
For more information on this and other digital IP solutions, visit the TES IP products page.
Contact
For inquiries, please email sales@tes-dst.com
About TES
With over 20 years of experience in ASIC design and embedded graphics IP, TES is a one-stop partner for high-performance semiconductor solutions. Our IP portfolio includes highly customizable 2D, 2.5D, and 3D GPUs, display controllers, and a wide range of analog and digital IP blocks, ranging from SiGe RF to industrial ASIC solutions.
Headquartered near Stuttgart, Germany, TES Electronic Solutions GmbH serves a global customer base, with design operations in Stuttgart and graphics IP development in Hamburg. Learn more at www.tes-dst.com.
Related Semiconductor IP
Related News
- TES offers CAN Flexible Data-Rate Controller IP Core for System-on-Chip (SoC) Designs
- TES unveils a next-generation Elliptic Curve Digital Signature Algorithm (ECDSA) IP Core for Secure IoT, Blockchain, and Industrial Systems
- CAST Introduces JPEG XL Encoder IP Core for High- Quality, On-Camera Still-Image Compression
- EagleChip Selects CAST TSN IP Core to Enhance Advanced Intelligent Control SoC
Latest News
- Imec unlocks fourfold UWB range extension using world-first narrowband receiver chip compliant with IEEE 802.15.4ab standard
- Alliance for Open Media Releases AV2 Codec, Advancing Next-Generation Open Video Coding
- VeriSilicon Drives Commercial Adoption of AV2 Across Next-Generation Video and Streaming Applications
- Cadence Announces Collaboration with Intel Foundry to Accelerate Intel 14A Process Optimization for HPC and Mobile Designs
- Menta and Presto Engineering Announce Strategic Collaboration to Accelerate Adaptive ASIC Architectures with Embedded FPGA Technology