SySDSoft Ports Complete LTE Protocol Stack to Tensilica's Atlas LTE Reference Architecture 2010-07-28 07:41:00 SoC Architecture & Assembly
Khronos Drives Rapid Evolution of Cross-Platform 3D Graphics with Release of OpenGL 4.1 Specification 2010-07-27 16:14:00 Misc
ITC Issues Notice of Final Determination in Rambus Matter Regarding NVIDIA Products 2010-07-27 16:11:00 Legal & IP Strategy
Xilinx Improves Design Flow for Industry's Only Proven Partial Reconfiguration FPGA Technology with ISE Design Suite 12.2 2010-07-27 13:22:00 SoC Architecture & Assembly
ARM Holdings plc Reports Results for the Second Quarter and Half Year Ended 30 June 2010 2010-07-27 12:47:00 Financials
Virage Logic Continues to Broaden Semiconductor IP Offering with New Portfolio of SoC Infrastructure Solutions 2010-07-27 10:13:00 IP Cores & Design
Virage Logic Expands Semiconductor IP Portfolio with Silicon-Proven SiANA(TM) Analog IP Offering 2010-07-27 10:10:00 IP Cores & Design
Virage Logic's New ARC(R) Sound AS221BD Dual-Core Processor Targets Blu-ray Audio 2010-07-27 10:07:00 IP Cores & Design
eMemory prevails to become the first automotive grade OTP provider to automotive IC makers 2010-07-27 09:41:00 IP Cores & Design
Altera's Stratix V FPGAs Provide RLDRAM 3 Memory Support 2010-07-26 16:23:00 SoC Architecture & Assembly
NetLogic Microsystems Announces Breakthrough Multi-Core Processor Solution which Integrates 128 NXCPUs 2010-07-26 15:18:00 SoC Architecture & Assembly
MIPS Technologies Delivers Reference Implementation for Skype on MIPS-Based Devices 2010-07-26 15:15:00 SoC Architecture & Assembly
MindTree Unveils Bluetooth Low Energy Stack on TI's WiLink 7.0 Solution 2010-07-26 13:22:00 SoC Architecture & Assembly
NXP acquires Jennic to extend leadership in low power RF solutions for wireless applications 2010-07-26 11:57:00 Strategic Partnerships
Mentor Graphics Collaboration with National Instruments Speeds Time to Market with Faster Test Bench Development 2010-07-26 03:39:00 SoC Architecture & Assembly
Dolphin Integration announces the availability of the HD-LP Panoply at 130 nm for reducing SoC area up to 20% 2010-07-23 17:33:00 IP Cores & Design