DiSTI and TES Electronics Solutions are Driving Down the Costs to Develop On-Screen Displays
Orlando, FL -- April 20, 2009 – The DiSTI Corporation, a global leader in Human Machine Interface (HMI) development, today announces GL Studio® integration with the D/AVE 2D hardware IP core rendering engine produced by TES Electronic Solutions. This new capability enables the award winning GL Studio toolkit to produce embeddable interface content for commercial grade FPGA applications including electronic dashboards and on-screen displays for the Automotive and Aviation industries. A functional demonstration of a GL Studio developed interface, rendered by the D/AVE 2D hardware IP core into the Altera Cyclone® III family of FPGA, will be featured in Booth 927 at the SAE World Congress in Detroit, Michigan, April 20-23, 2009.
The use of FPGA (field programmable gate array) technology, coupled with the high-end GL Studio user interface development tool supporting industry standard OpenGL & OpenGL ES graphics APIs, allows the embedded display development community to produce high quality graphics content with a shorter time-to-market, insulation against hardware end-of-life, ability to re-program in the field to fix bugs, and lowers non-recurring engineering costs.
“This new product integration with D/AVE 2D from TES Electronic Solutions will provide unprecedented power and flexibility in generating compelling on-screen displays at a fraction of the traditional development and deployment costs,” says Darren Humphrey, Chief Technology Officer for DiSTI. “The Automotive and Aerospace industries have been waiting for this breakthrough technology to expand the limits of what they can do with display development and we are proud to be at the forefront of this technology.”
The sample interface, developed by DiSTI using GL Studio as a proof-of-concept demonstrator, illustrates a multifunction automotive on-screen display featuring dashboard instrumentation, environmental controls, entertainment controls, and system diagnostics. A complete development environment will be demonstrated at the SAE World Congress to showcase how rapidly and effortlessly automotive manufacturers can develop these new, next generation displays.
The use of FPGA (field programmable gate array) technology, coupled with the high-end GL Studio user interface development tool supporting industry standard OpenGL & OpenGL ES graphics APIs, allows the embedded display development community to produce high quality graphics content with a shorter time-to-market, insulation against hardware end-of-life, ability to re-program in the field to fix bugs, and lowers non-recurring engineering costs.
“This new product integration with D/AVE 2D from TES Electronic Solutions will provide unprecedented power and flexibility in generating compelling on-screen displays at a fraction of the traditional development and deployment costs,” says Darren Humphrey, Chief Technology Officer for DiSTI. “The Automotive and Aerospace industries have been waiting for this breakthrough technology to expand the limits of what they can do with display development and we are proud to be at the forefront of this technology.”
The sample interface, developed by DiSTI using GL Studio as a proof-of-concept demonstrator, illustrates a multifunction automotive on-screen display featuring dashboard instrumentation, environmental controls, entertainment controls, and system diagnostics. A complete development environment will be demonstrated at the SAE World Congress to showcase how rapidly and effortlessly automotive manufacturers can develop these new, next generation displays.
Related Semiconductor IP
- Advanced 2D Noise Reduction core
- 2D (sprite graphics) GPU IP
- 2D Blit and Raster Graphics
- High-performance and low-power 2D vector graphics IP core
- Vivante 2D GPU IP
Related News
- CAST Introduces 400 Gbps UDP/IP Hardware Stack IP Core for High-Performance ASIC Designs
- CAST Licenses TCP/IP Hardware Stack Core for Keysight FieldFox Handheld Spectrum Analyzers
- Imagination and Telechips drive automotive display diversity with hardware virtualization
- SoC Secure Boot Hardware Engine IP Core Now Available from CAST
Latest News
- Altera Expands DDR5 Memory Support Across Agilex FPGA Portfolio
- Movellus Brings Power Optimization IP to Samsung Electronics’ Advanced Nodes
- OpenLight and Tower Semiconductor Expand PH18DA Photonics Ecosystem to Accelerate Photonic IC Development
- Global Semiconductor Sales Increase 35.1% from Q1 2026 to Q2 2026
- Ceva, Inc. Announces Second Quarter 2026 Financial Results