What is Vivante 2D GPU IP?
Vivante 2D GPU IP is a GPU IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub.
Vendor:
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Category:
GPU
Vivante 2D GPU IP
Mature IPs expand from 2D graphics to video processing and AI preprocessing
Overview
Mature IPs expand from 2D graphics to video processing and AI preprocessing
VeriSilicon's Vivante 2D GPU IP series provides mature 2D graphics solution, working with display IP and 3D GPU. It is enhanced with new technology of versatile color format support, multi-layer video and graphics composition, video processing basic functions, and AI preprocessing functions. This makes the 2D GPU IP the optimal solution for many applications, such as multilayer hardware composition engine in consumer devices, basic video processing engine in data center, and AI preprocessing engine in AI server. It delivers high performance with low cost and low power in all the applications from efficient hardware design and VeriSilicon frame buffer compression technology.
| GC620L | GC620 | GC820 | GC820H | |
| Xwindow (EXA) | √ | √ | √ | √ |
| Hardware Composer (HWC) | √ | √ | √ | √ |
| DirectFB | √ | √ | √ | √ |
| Pixel Rate (Pixels/Cycle) | 4 | 4 | 2 | 4 |
| Target Display Resolution | 2.5K~4K | 4K | 4K | 8K |
| Direct 3D Tile Status and Buffer Option | YES | YES | YES | YES |
| Formats Support | RGB & YUV Limited | RGB & YUV | RGB & YUV FP16/32 | RGB & YUV FP16/32 |
Specifications
Identity
Part Number
Vivante 2D GPU IP
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
Frequently asked questions about GPU IP cores
How should engineers evaluate this GPU?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GPU IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.