Why Firms Fail At FPGA
December 23, 2020
The fallers at the FPGA fence are a roll-call of the industry’s finest: Intel, TI, Motorola, IBM, Philips, Toshiba and AMD.
20 years ago, Raul Sud, the founder and CEO of Lattice Semiconductor, told me shy they had all failed.
“Most managements who have tried to do FPGA wanted to do it quickly,” said Sud, “they’ve said: ‘Let’s take a licence’, so they’ve taken a licence,and got a mask-set and a software tool-set and, and run wafers and got into the business and, after six months, along comes a software update and they’re in trouble. Because they don’t have a deep understanding.”
”There’s no such thing as a quick entry; no such thing as a quick understanding.” He said.
To read the full article, click here
Related Semiconductor IP
- Over-Voltage Lockout (OVLO) IP
- Verification IP for Universal Chiplet Interconnect Express (UCIe) up to 3.0
- UCIe-S (Gen2) Compatible PHY for Standard Package (x16) in TSMC N3P, North/South Orientation
- DSP-Based 112G SerDes
- XTAL oscillator in TSMC-7nm
Related Blogs
- Why Embedded FPGA is a New IP Category?
- Semiconductor Design Firms are Embracing the Public Cloud. Here are 5 Reasons Why.
- Why thinking about software and security is so important right at the start of an ASIC design
- Why is Hard IP a Better Solution for Embedded FPGA (eFPGA) Technology?
Latest Blogs
- M31 High-Speed and Long-Channel MIPI C/D-PHY Solution on TSMC N3P/N3C
- Understanding security certification and how analog IP can help
- Embedded Security explained: Secure boot for embedded systems
- World's First Standards-Compliant 112G PHY IP for Linear Optics: A Turning Point for AI Interconnects
- One Key for Every Door: How Aliro Extends the UWB Digital Key Beyond the Car