Why Firms Fail At FPGA
December 23, 2020
The fallers at the FPGA fence are a roll-call of the industry’s finest: Intel, TI, Motorola, IBM, Philips, Toshiba and AMD.
20 years ago, Raul Sud, the founder and CEO of Lattice Semiconductor, told me shy they had all failed.
“Most managements who have tried to do FPGA wanted to do it quickly,” said Sud, “they’ve said: ‘Let’s take a licence’, so they’ve taken a licence,and got a mask-set and a software tool-set and, and run wafers and got into the business and, after six months, along comes a software update and they’re in trouble. Because they don’t have a deep understanding.”
”There’s no such thing as a quick entry; no such thing as a quick understanding.” He said.
To read the full article, click here
Related Semiconductor IP
- USB-C Power Delivery IP Core
- Configurable Multi-Channel DMA Controller
- Samsung Foundry 4nm 1V8 GPIO I3C
- Root-of-Trust IP - High-Assurance Security for Advanced and Regulated Applications
- Root-of-Trust IP - Enhanced-Assurance, Configurable Security for Scalable Semiconductor Designs
Related Blogs
- Why schematic-correct designs fail at advanced nodes
- Semiconductor Design Firms are Embracing the Public Cloud. Here are 5 Reasons Why.
- Why thinking about software and security is so important right at the start of an ASIC design
- Why is Hard IP a Better Solution for Embedded FPGA (eFPGA) Technology?
Latest Blogs
- The $725 Million Chip Development: Why Execution Risk, Not IP Cost, Now Dictates Advanced-Node Survival
- From photon to actuation: How physical AI is redefining embedded compute
- Secure Boot for embedded Linux on Efinix Ti375C529: Getting started with KiviBoot-Linux
- Akida in High-Frequency Trading: The Smart Signal Layer
- Cadence Expands Sovereign AI in Europe: From Chips to AI Factories