The Status and Future of FDSOI
I recently took a look at the current status and future direction of FinFET based logic processes in my Leading Edge Logic Landscape blog. I thought it would be interesting to take a similar look at FDSOI and to compare and contrast the two processes.
As a reminder from the Leading Edge Logic Landscape blog, I will be using a formula developed by ASML to take my pitch projections and turn them into "Standard Nodes" for comparison purposes (the formula is described in the leading edge blog).
To read the full article, click here
Related Semiconductor IP
- MIPI D-PHY Transmitter/Receiver for Samsung 28nm FD-SOI
- GLOBALFOUNDARIES 22nm FDSOI LVDS Transceiver Pad
- Samsung 28nm FDSOI MIPI DPHY V1.1
- Samsung 28nm FDSOI 1.8v/1.0v LVDS Transmitter
- Samsung 28nm FDSOI 1.8v/1.0v sub-LVDS Receiver
Related Blogs
- eUSB2V2: Trends and Innovations Shaping the Future of Embedded Connectivity
- UEC-LLR: The Future of Loss Recovery in Ethernet for AI and HPC
- Building the Future of AI on Intelligent Accelerators
- Cadence at the TSMC OIP: Pioneering the Future of Semiconductor Design
Latest Blogs
- Pioneering Secure-by-Design in the Age of the European CRA
- Overcoming power management IP challenges
- Running OpenCode with llama.cpp and Qwen 3.5 on E-Series
- Automated, Faster Specification to Sign-Off with IDS-AI
- NovaTech Automation Crius PIU: Bringing Conventional Instrument Transformers onto the IEC 61850 Process Bus