The Status and Future of FDSOI
I recently took a look at the current status and future direction of FinFET based logic processes in my Leading Edge Logic Landscape blog. I thought it would be interesting to take a similar look at FDSOI and to compare and contrast the two processes.
As a reminder from the Leading Edge Logic Landscape blog, I will be using a formula developed by ASML to take my pitch projections and turn them into "Standard Nodes" for comparison purposes (the formula is described in the leading edge blog).
To read the full article, click here
Related Semiconductor IP
- MIPI D-PHY Transmitter/Receiver for Samsung 28nm FD-SOI
- GLOBALFOUNDARIES 22nm FDSOI LVDS Transceiver Pad
- Samsung 28nm FDSOI MIPI DPHY V1.1
- Samsung 28nm FDSOI 1.8v/1.0v LVDS Transmitter
- Samsung 28nm FDSOI 1.8v/1.0v sub-LVDS Receiver
Related Blogs
- eUSB2V2: Trends and Innovations Shaping the Future of Embedded Connectivity
- The Future of AI is Modular: Why the SiFive-NVIDIA Milestone Matters
- The Silent Guardian of AI Compute - PUFrt Unifies Hardware Security and Memory Repair to Build the Trust Foundation for AI Factories
- The Architectural Evolution of 16GHz PLLs for Next-Gen AI and SerDes SoCs
Latest Blogs
- The $725 Million Chip Development: Why Execution Risk, Not IP Cost, Now Dictates Advanced-Node Survival
- From photon to actuation: How physical AI is redefining embedded compute
- Secure Boot for embedded Linux on Efinix Ti375C529: Getting started with KiviBoot-Linux
- Akida in High-Frequency Trading: The Smart Signal Layer
- Cadence Expands Sovereign AI in Europe: From Chips to AI Factories