PCIe 5.0 Demos: IP and VIP for AI, Cloud, Storage, and Networking
This year’s PCI-SIG Developers Conference took place at the Santa Clara Convention Center on June 5-6. Synopsys provided several demos covering the PCIe 5.0 Integrated IP Core, PHY, and Verification IP & source code Test Suites. There was a constant pool of inquisitive attendees interacting with our PCIe design and verification experts regarding the demos.
The Verification demo was centered around the PCIe 5.0 VIP acting as a Root Complex talking to our Integrated IP for PCIe 5.0 Endpoint. We specifically highlighted one of our PCIe 5.0 tests from the UVM source code test suites. The demo walked users through linkup and training including equalization. The test executed configuration of the BAR and then a series of DMA transfers. The demo also showcased natively integrated Verdi Protocol Analyzer for easy and fast transaction level debug.
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Related Semiconductor IP
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