Essential Abstractions
A recent press release related to the all-programmable initiative from Xilinx attracted my attention a few weeks back.
Essentially, the initiative showcases Xilinx's effort in abstracting system-level (hardware and software) design flows -- from algorithm to RTL development under one umbrella. With a closed and finite IP ecosystem based around FPGAs, it is now easy for FPGA companies to develop seamless and push-button flows that integrate hardware and software design. So, what about non-FPGA players? What kind of flow integration and abstractions can they shoot for?
Abstractions have become essential in almost all disciplines of engineering, and our EDA/IC industry is no different. With product engineering becoming complex, multi-disciplinary, and requiring short TTM (time to market), there is a need to manage and hide complexity at each delivery point. Or, on a lighter note, when complexity outstrips the understanding of a single human brain, there is a need for abstraction. The consumer of an abstraction is concerned only with the exposed interface's usability and performance.
To read the full article, click here
Related Semiconductor IP
- Xilinx Virtual Cable
- 25 Gb/s AES-ECB 128/192/256 Crypto Cores
- Xilinx HMC Controller
- Xilinx MicroBlaze Trace Core (XMTC)
- Xilinx Ultra Scale Plus SATA HOST IP
Related Blogs
- The Heart of SiFive is Performance, Intelligence, & Essential
- Why ESD Co-Design is Essential for Next-Gen ICs
- Root of Trust: A Security Essential for Cyber Defense
- Building Secure Chips: Why Hardware Security Assurance Is Now Essential
Latest Blogs
- Building the engine behind Arm’s silicon shift
- M31 High-Speed and Long-Channel MIPI C/D-PHY Solution on TSMC N3P/N3C
- Understanding security certification and how analog IP can help
- Embedded Security explained: Secure boot for embedded systems
- World's First Standards-Compliant 112G PHY IP for Linear Optics: A Turning Point for AI Interconnects