Design for Verification: A Natural Next Step?

By EETimes

January 8, 2015

Let's look at a variety of "Design for Verification" techniques aimed at reducing bugs and making designs easier to verify.

After years of innovation in verification of increasingly complex designs, should we now turn our attention to the design process itself? Since starting in verification in the early 1990s, I have witnessed the introduction of code and functional coverage, constrained random, assertions, numerous metrics, formal verification, various languages and methodologies, and, more recently, Requirements Driven Verification. However, we have never considered in detail how to reduce the number of bugs that get introduced into the designs in the first place and ways to make them easier to find.

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