New AMBA 5 ACE/AXI Specification: More About Atomic Transactions
As discussed in the previous installment of this blog, a new class of atomic transactions was introduced in the AMBA® 5 ACE/AXI specification to make operations at the remote locations more streamlined and efficient. We have considered an example of AtomicStore transaction with ADD operation and discussed why it was more efficient than relying on the older semaphore-like exclusive operations. In this installment of the blog we will take a broader look at all atomic transactions and review the changes in signaling.
To begin with, there are four (4) atomic transactions:
- AtomicStore
- AtomicLoad
- AtomicSwap
- AtomicCompare
To read the full article, click here
Related Semiconductor IP
- AMBA 5 CHI Verification IP
- AMBA 5 CHI Verification IP
- AMBA 5 AHB Bus Verification IP
- AMBA 5 AHB Verification IP
- AMBA 5 CHI Synthesizable Transactor
Related Blogs
- New AMBA 5 ACE/AXI Specification: Rationale for Atomic Transactions
- New AMBA 5 ACE/AXI Specification and Its Support in Cadence ACE/AXI VIP
- Debug of AMBA AXI Outstanding Transactions
- Jumping the Barrier of Verifying AMBA ACE Barrier Transactions
Latest Blogs
- Embedded Security explained: Advanced Encryption Standard (AES)
- Cadence Demonstrates PCIe 8.0 PHY at PCI-SIG DevCon 2026
- Cadence Achieves Successful Silicon Validation of 1st IP Test Chips on Intel 18A
- From Classical CAN and CAN FD to CAN XL: Functional Safety and Security for Next-Generation In-Vehicle Communication
- Accelerating Embedded Memory Performance with 16-bit xSPI PSRAM IP