Physware Names Former Synopsys CTO Raul Camposano as CEO
Company Expands Leadership Role in Scalable and Parallel System Simulation
MOUNTAIN VIEW, CA. – November 30, 2010 – Physware, a leading provider of scalable and parallel solutions for Signal Integrity (SI), Power Integrity (PI), Electromagnetic Interference (EMI) and Simultaneous Noise Integrity (SNI), today announced the appointment of Dr. Raul Camposano as Chief Executive Officer.
Before joining Physware, Dr. Camposano held several senior roles in industry and in academia, both in the United States and Germany. He was CTO, senior vice president and general manager for over 10 years at Synopsys. After Synopsys, he served as CEO of Xoomsys. Dr. Camposano is active in the EDA professional community, serving on various boards, technical program committees and editorial boards worldwide. He has published over 70 articles and three books on electronic design automation and was elected a fellow of the IEEE in 1999. Dr. Camposano holds an M.S. from the University of Chile and a Ph.D. in computer science from the University of Karlsruhe.
"Physware is the right technology at the right time,” said Dr. Camposano. “Harnessing the massive computing power of the cloud to effectively scale 3D electromagnetic simulation to run very large designs is the future of 3DIC, package and board design. I'm excited to join this outstanding team.”
"I am delighted that someone with Raul’s industry experience and stature sees the potential of our technology,” said Greg Gottesman, board member of Physware and Managing Director of Madrona Venture Group. “I can't think of a better person to lead our company through the coming period of growth.”
Physware technology leverages the ongoing trend towards pervasive parallel computing, in particular multi-core CPUs and Cloud Computing. The company’s patent-pending, physics-aware technology tightly couples analysis and design methods to the underlying Maxwell’s and circuit equations, enabling efficient chip-package-system co-design and robustness and efficiency at every step of the design cycle while significantly reducing time to market. Physware’s accelerated technology delivers unprecedented capacity, handling in 3DIC, package and system simulations.
"Today's CEO announcement is a strong endorsement of Physware's business and our strategic vision," said Bala Vishwanath, President of Physware. "Physware will greatly benefit from Raul's experience in driving value creation for our customers. His industry experience is an ideal complement to our current management team to continue to deliver on Physware’s business plan."
About Physware
Physware provides high-speed and high-capacity 3D electromagnetic signal integrity, power integrity and EMI analysis field solutions for the microelectronics industry. Physware’s accelerated technology delivers unprecedented capacity handling, significantly faster speed than current methodologies, and the ability to span the entire design cycle while maintaining concurrent, uncompromising Maxwell accuracy.
Physware is a venture-backed, privately-held company led by an experienced management team. The technology is based on multiple industry publications and patented methodologies. For additional information, please visit www.physware.com.
Related Semiconductor IP
- Specialized Video Processing NPU IP for SR, NR, Demosaic, AI ISP, Object Detection, Semantic Segmentation
- Ultra-Low-Power Temperature/Voltage Monitor
- Multi-channel Ultra Ethernet TSS Transform Engine
- Configurable CPU tailored precisely to your needs
- Ultra high-performance low-power ADC
Related News
- Everspin Appoints Semiconductor Storage Veteran Kevin Conley as CEO
- TSMC Dr. Morris Chang Announces Retirement in June 2018. Future Dual Leadership Will Be Mark Liu as Chairman And C.C. Wei as CEO.
- CEO interview: S3 Semi ready for custom opportunity
- Arm CEO Sounds Security Alarm
Latest News
- Siemens accelerates integrated circuit design and verification with agentic AI in Questa One
- Weebit Nano achieves record half-year revenue; licenses ReRAM to Tier-1 Texas Instruments
- IObundle Releases Open-Source UART16550 Core for FPGA SoC Design
- Rapidus Secures 267.6 Billion Yen in Funding from Japan Government and Private Sector Companies
- DNP Invests in Rapidus to Support the Establishment of Mass Production for Next-Generation Semiconductors