Jasper Introduces Intelligent Proof Kits For Faster, More Accurate Verification of SoC Interface Protocols
MOUNTAIN VIEW, Calif. – Dec. 14, 2010 – Jasper Design Automation, provider of advanced formal technology solutions, today introduced Intelligent Proof Kits for accelerated certification of advanced SoC interconnect protocols. Jasper Intelligent Proof Kits encapsulate critical behaviors for popular protocols such as ARM’s AMBA, letting users quickly configure designs to the standard or adapt them to their own custom configuration. Intelligent Proof Kits are optimized for high-level verification with Jasper’s ActiveDesign™ and JasperGold® formal verification, and designers benefit from these kits especially in combination with Jasper’s unique Visualize technology.
“The next evolutionary step for Proof Kits is to encompass more intelligence, more plug-and-play functionality, more automation and more flexibility,” said Lawrence Loh, Jasper Vice President of Worldwide Applications Engineering. “We work very closely with our partners to ensure Jasper’s Intelligent Proof Kits match the protocol specs precisely. In addition, Jasper Proof Kits are easily comprehensible by users, so they can be adapted for proprietary extensions to standard protocols.”
Users can deploy Intelligent Proof Kits from early in the design cycle, all the way through verification. Automated features allow for rapid integration into the design. Users can visualize selected properties and analyze timing diagrams to understand property behaviors, and cross-reference to the specifications through ActiveDesign, and the design protocol properties can then be seamlessly proven in JasperGold formal verification.
Availability
Jasper Intelligent Proof Kits ship unencrypted with original source code to facilitate user customization and insights into the protocols themselves. Jasper is initially rolling out Intelligent Proof Kits for AMBA 3 and AMBA 4, followed closely by DFI, DDR and LPDDR versions.
About Jasper Design Automation
Jasper delivers industry-leading EDA software solutions for semiconductor design, verification, and reuse, based on the state-of-the-art formal technology. Customers include worldwide leaders in wireless, consumer, computing, and networking electronics, with over 150 successful chip deployments. Jasper, headquartered in Mountain View, California, is privately held, with offices and distributors in North America, South America, Europe, and Asia. Visit www.jasper-da.com to reduce risks; increase design, verification and reuse productivity; and accelerate time to market.
Related Semiconductor IP
- Specialized Video Processing NPU IP for SR, NR, Demosaic, AI ISP, Object Detection, Semantic Segmentation
- Ultra-Low-Power Temperature/Voltage Monitor
- Multi-channel Ultra Ethernet TSS Transform Engine
- Configurable CPU tailored precisely to your needs
- Ultra high-performance low-power ADC
Related News
- Arteris Selected by Black Sesame Technologies for Next Generation of Intelligent Driving Silicon
- Akeana Partners with Axiomise for Formal Verification of Its Cores
- Jasper Releases New Formal Verification Proof Kits For LPDDR1, LPDDR2 and DDR3
- Jasper DFI Formal Verification Proof Kits Now Available
Latest News
- Siemens accelerates integrated circuit design and verification with agentic AI in Questa One
- Weebit Nano achieves record half-year revenue; licenses ReRAM to Tier-1 Texas Instruments
- IObundle Releases Open-Source UART16550 Core for FPGA SoC Design
- Rapidus Secures 267.6 Billion Yen in Funding from Japan Government and Private Sector Companies
- DNP Invests in Rapidus to Support the Establishment of Mass Production for Next-Generation Semiconductors