Digital Blocks AMBA Multi-Channel DMA Controller IP Core Family Extends Leadership with targeted applications in DMA Streaming of Video and Data over PCIe or UDP/IP Network Interface.
GLEN ROCK, New Jersey, January 29, 2020 – Digital Blocks, a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for system-on-chip (SoC) ASIC, ASSP, & FPGA developers, announces additions to DMA Controller Verilog IP Core offerings with capabilites to stream video or data to and from memory as well as to and from over PCIe and UDP/IP Network Interfaces.
Digital Blocks DMA Controller IP Core family members are as follows:
| DMA Controller Engines |
| UDP/IP Hardware Stack with DMA Controller |
| PCIe Interface with DMA Controller |
| AXI4-Stream to Memory driven by DMA Controller |
| AXI4-Stream from Memory driven by DMA Controller |
| AXI4 Multi-Channel DMA Controller, 1-64 Channels, Scatter-Gather, 2D transfers, Security, high perfomance |
| AHB5 Multi-Channel DMA Controller – targets latest AHB Interconnect |
“The UDP/IP DMA Controller combines Digital Blocks expertise in UDP networking and high-performance DMA Controllers” said Steven Stein, CEO of Digital Blocks. “Likewise, the PCIe Interface with DMA Controller supports Xilinx and Intel/Altera PCIe IP to transfer video up to demaing UHD.”
Price and Availability
The Digital Blocks DMA Controller IP Core family is available in synthesizable Verilog, along with a comprehensive simulation test suite, datasheet, and user manual. For further information, product evaluation, or pricing, please go to Digital Blocks at https://www.digitalblocks.com/dma.html
About Digital Blocks
Digital Blocks is a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for system-on-chip (SoC) ASIC, ASSP, & FPGA developers requiring best-in-class IP for Embedded Processors, I2C/SPI/DMA Peripherals, TFT LCD/OLED Display Controllers & Processors, 2D Graphics Hardware Accelerator Engines, LVDS Display Link Layer Drivers, Video Signal & Image Processing, and Low-Latency TCP/UDP/RTP Hardware Protocol Stacks.
Digital Blocks designs silicon-proven IP cores for technology systems companies, reducing customer’s development costs and significantly improving their time-to-volume goals. Digital Blocks is located at 587 Rock Rd, Glen Rock, NJ 07452 (USA). Phone: +1-201-251-1281; Fax: +1- 702-552-1905; Media Contact: info@digitalblocks.com; Sales Inquiries: info@digitalblock.com; On the Web at www.digitalblocks.com
Related Semiconductor IP
- DMA Controller
- AHB/AXI/Wishbone DMA Controller
- DMA Controller with TileLink IIP
- DMA Controller with OCP IIP
- DMA Controller with AXI IIP
Related News
- Digital Blocks AMBA Multi-Channel DMA Controller IP Core Family Extends Leadership with releases for core DMA Engines in RISC-V® & ARM® Systems and Peripherals to Memory Applications
- Digital Blocks Announces the AMBA Multi-Channel DMA Controller IP Core
- DDMA, multi-channel DMA Controller IP core from DCD-SEMI
- Digital Blocks DMA Controller Verilog IP Core Family Extends Leadership with enhancements to AXI4 Memory Map and Streaming Interfaces
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