ASIC Architect Announces Availability of Configurable AMBA 3 AXI Bridge for DDR Controller Cores
ASIC Architect Expands its DDR Offerings with AMBA© 3 AXITM Bridge for DDR Controller Cores
SANTA CLARA, CA., December 26, 2006 -- ASIC Architect, Inc. today announced the availability of Configurable AMBA© 3 AXITM; Bridge IP for its DDR Controller Cores. This solution will enable SoC designers to plug-in DDR Controller Core into AMBA3 AXI system bus, and mitigate the implementation risk and time-to-market challenges.
ASIC Architect is a high-speed controller solutions company. The company's portfolio of high end products includes PCI Express, DDR and SATA controller cores. The cores provide optimized solutions targeted for wireless, consumer, telecommunication and networking markets.
"At ASIC Architect, we are focusing on standards based IP with a commitment to developing leading edge implementation solutions for today's high-end SOC designs. Following the footsteps of successful completion of PCI Express AMBA 3 AXI Bridge, our engineers have developed AMBA 3 AXI Bridge IP for DDR Controller Core, for our lead customers." says Purna Mohanty, Vice President of ASIC Architect, Inc. "AMBA 3 AXI Bridge for DDR Controller Core is a configurable, high performance and scalable solution. The usual datapath complexities of the DDR controller core are built-into the bridge solution."
About ASIC Architect Products and Services:
ASIC Architect offers a wide range of high speed controller cores - PCI Express, DDR and SATA Cores, and the solution logic for these high-end cores for ASIC and SoC. The company is headquartered in Santa Clara, CA, USA with a design center at Bhubaneswar, India.
Related Semiconductor IP
- Xtal Oscillator on TSMC CLN7FF
- Wide Range Programmable Integer PLL on UMC L65LL
- Wide Range Programmable Integer PLL on UMC L130EHS
- Wide Range Programmable Integer PLL on TSMC CLN90G-GT-LP
- Wide Range Programmable Integer PLL on TSMC CLN80GC
Related News
- Synopsys' New Designware Bridge IP for PCI Express to AMBA 3 AXI Connects Two High-Performance Domains
- ASIC Architect Announces the Availability of Configurable AMBA3 AXI Bridge for PCI Express Controller Cores
- Synopsys Announces Industry's First Fully Released Verification IP for the AMBA 3 AXI Standard
- Synopsys DesignWare Verification IP for AMBA 3 AXI is First to Earn ARM 'AMBA 3 Assured' Logo Certification
Latest News
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- The world’s first open source security chip hits production with Google
- ZeroPoint Technologies Unveils Groundbreaking Compression Solution to Increase Foundational Model Addressable Memory by 50%
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- AheadComputing Raises $21.5M Seed Round and Introduces Breakthrough Microprocessor Architecture Designed for Next Era of General-Purpose Computing