The AHB SRAM Controller provides a standard AHB interface to translate AHB bus reads and writes into reads and writes with the si…
- Bus Fabric
- Silicon Proven
- Now
- AHB
The AHB SRAM Controller provides a standard AHB interface to translate AHB bus reads and writes into reads and writes with the si…
In production since 2012 for dozens of designs.The Cadence® Memory Model Verification IP (VIP) for Flash Octal SPI (OSPI) Flash p…
STAR4000 consists of a frequency regulated voltage doubler (to produce VQQ) followed by a frequency-regulated voltage tripler (to…
AHB Secure Subsystem - ARM Cortex M3
The Secure AHB Performance Subsystem is a high-performance AHB subsystem that allows for a high level of hardware and software se…
Digital and mixed-signal IP and ASIC RISC-V reference design for USB Type-C/PD power adapter/charger
IQonIC Works USB-C/PD power adapter IP includes components required to build an integrated programmable power supply (PPS) charge…
The AHB SRAM Controller provides a standard AHB interface to translate AHB bus reads and writes into reads and writes with the si…
Data protection from safeguarded anti-fuse OTP memory Secure OTP is a combined Physical Macro, and Digital RTL providing comprehe…
CrossBar Resistive RAM (ReRAM) is a non-volatile memory (NVM) that can be integrated into any complementary metal-oxide semicondu…
PZT 3-axis MEMS gyro interface
STAR2010 is an ASIC in a 1.8V/3.3V, 0.18µm CMOS process which is integrated with a 3-axis MEMS gyroscope.
Hardware root key generation and storage that never leaves the chip PUFrt includes a 1024-bit physical unclonable function (PUF) …
PUFcc is a novel high-security Crypto Coprocessor.
Secure Storage Solution for OTP IP
The Synopsys Secure Storage Solution for OTP is an add-on to Synopsys One-Time Programmable (OTP) Non-Volatile Memory (NVM) IP.
GF 22FDX 5.5V OTP Auto-Grade1 IO Inline
Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.
Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.
Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.
NVM OTP XBC TSMC N5A 1.2V Automotive Grade 1 with Functional Safety
Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.
Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.
Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.
GF 22FDX 5.5V OTP Auto-Grade1 IO Staggered
Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.
130nm OTP Non Volatile Memory for Standard CMOS Logic Process
NSCore's PermSRAM(R) is the only embedded CMOS, one time programmable (OTP), non-volatile RAM IP of its kind, utilizing the 'hot …