Crypto Box Toolset Secure Accelerator
Versatile Crypto Box IP Core with Robust SCA/FI Protections for Balanced Embedded Systems FortifyIQ’s Crypto Box IP core is a hig…
- Security Coprocessor
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Crypto Box Toolset Secure Accelerator
Versatile Crypto Box IP Core with Robust SCA/FI Protections for Balanced Embedded Systems FortifyIQ’s Crypto Box IP core is a hig…
Crypto Box Toolset Secure Accelerator
Compact Crypto Box IP Core for Resource-Constrained Devices FortifyIQ’s Crypto Box IP core is a compact, power-efficient cryptogr…
Compact and Secure Post-Quantum Signature SW Library for Resource-Constrained Devices As classical digital signature algorithms f…
Compact and Secure Post-Quantum Key Encapsulation SW Library for Resource-Constrained Devices As classical asymmetric encryption …
High-Performance Hybrid Classical and Post-Quantum Cryptography
Hybrid Classical and Post-Quantum Cryptography IP Core for Future-Proof Security FortifyIQ’s High-Performance Hybrid Cryptography…
Hybrid Classical and Post-Quantum Cryptography
Hybrid Classical and Post-Quantum Cryptography IP Core for Future-Proof Security FortifyIQ’s Hybrid Cryptography IP core combines…
Versatile Post-Quantum Cryptography IP Core for Balanced Performance, Area, and Power FortifyIQ’s Post-Quantum Cryptography IP co…
Compact and Secure Post-Quantum Signature IP Core for Resource-Constrained Devices As digital signature algorithms face obsolesce…
Compact and Secure Post-Quantum ML-KEM IP Core for Resource-Constrained Devices As quantum computing threatens traditional public…
The eDP 2.0 Verification IP provides an effective & efficient way to verify the components interfacing with the eDP interface of …
RISC-V-Based, Open Source AI Accelerator for the Edge
Coral NPU is a machine learning (ML) accelerator core designed for energy-efficient AI at the edge.
Inline Decrypter & Authenticator IP Core for Automotive
The Inline Decrypter and Authenticator IP core enables on-the-fly execution of encrypted and signed code from Flash.
PKC Multi Hardware Accelerator IP
The PKC Multi hardware accelerator is a secure connection engine that can be used to offload the compute intensive Public Key ope…
XMSS Post-Quantum Cryptography IP
XMSS is a Post-Quantum Cryptographic (PQC) algorithm, meaning it is mathematically designed to be robust against a cryptanalytic …
Hardware Security Module (HSM) for AMD Xilinx Versal ACAP device
The HSM IP module is a Hardware Security Module for a wide range of applications.
The SHA cores provide implementation of cryptographic hashes “Keccak” SHA-3 (cores SHA3-224, SHA3-256, SHA3-384 and SHA3-512) and…
Empowering customers to thrive in the AI Era, INNOSILICON™ introduces its most 112G SerDes (Serializer/Deserializer) and Controll…
The ISO/IEC 7816 Verification IP offers a streamlined and efficient solution for verifying System-on-Chip (SoC) and IP designs th…
The ISO/IEC 14443 Verification IP offers a streamlined and efficient solution for verifying System-on-Chip (SoC) and IP designs t…
The PMBus Verification IP provides an effective and efficient way to verify the components interfacing with PMBus interface of an…