UMC 0.13um HS/FSG Logic Process metal2-start programming gate array cell library for FSC0H_J (ECO_M2)
- UMC
- 130nm
- HS
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
UMC 0.13um HS/FSG Logic Process metal2-start programming gate array cell library for FSC0H_J (ECO_M2)
UMC 0.13um SP/FSG Logic Process Metal1 Start ECO core cell library
UMC 0.13um SP/FSG Logic Process Metal1 Start ECO core cell library
UMC 0.3um HV process, M1-start ECO (engineering change order) core cell library
UMC 0.3um HV process, M1-start ECO (engineering change order) core cell library
UMC 0.13um LL/FSG Logic Process miniLib+ M1 ECO cells
UMC 0.13um LL/FSG Logic Process miniLib+ M1 ECO cells
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
UMC 90nm SP RVT process SSTL18 IO cell library
UMC 90nm SP RVT process SSTL18 IO cell library
UMC 90nm Logic/Mixed Mode SP(RVT) Low-K process;True 3.3V PECL IO Library.
UMC 90nm Logic/Mixed Mode SP(RVT) Low-K process;True 3.3V PECL IO Library.
UMC 0.13um LL process PCI I/O cells.
UMC 28nm Logic and Mixed-Mode Low-K HPC Process True 1.8V Low Power Low Frequency OSC IO Cell Library
UMC 28nm Logic and Mixed-Mode Low-K HPC Process True 1.8V High Frequency Oscillator BOAC IO Cell Library
Faraday 1.8V crystal oscillator I/O Cell Library ; UMC 14nm LOGIC_MIXED-FF+ Process
Faraday 1.8V crystal oscillator I/O Cell Library ; UMC 14nm LOGIC_MIXED-FF+ Process
UMC 55nm Embedded Flash and Embedded E2PROM Low Power Low-K Split-Gate Process Ture 3.3V Low Power Low Frequency OSC IO Cell Libr…
UMC 55nm e-flash Logic Process OSC High IO Library
UMC 55nm e-flash Logic Process OSC High IO Library
UMC 55nm SP/RVT LowK Logic Process True 3.3V Low Frequency OSC IO Cell Library
UMC 55nm SP/RVT LowK Logic Process True 3.3V Low Frequency OSC IO Cell Library
UMC 90nm LL/RVT Low-K Logic Process 2.5VOD3.3V Low Frequency OSC pad
UMC 90nm LL/RVT Low-K Logic Process 2.5VOD3.3V Low Frequency OSC pad
UMC 90nm LL/RVT Low-K Logic Process 2.5VOD3.3V Low Frequency OSC BOAC Pad
UMC 90nm LL/RVT Low-K Logic Process 2.5VOD3.3V Low Frequency OSC BOAC Pad
UMC 0.5um LOGIC process Low Voltage Gate Array true 5.0V Oscillator IO cells
UMC 0.5um LOGIC process Low Voltage Gate Array true 5.0V Oscillator IO cells
UMC 0.25um LOGIC process standard Multi-Voltage IO
UMC 0.25um LOGIC process standard Multi-Voltage IO
UMC 28nm Logic and Mixed-Mode HPC Processs Multi-Voltage BOAC SD3.0 I/O Cell library
UMC 28nm Logic and Mixed-Mode HPC Processs Multi-Voltage BOAC SD3.0 I/O Cell library
UMC 40nm LP/RVT Logic Process 1.8V/2.5V/3.3V multi-voltage generic POC BOAC I/O cell library
UMC 40nm LP/RVT Logic Process 1.8V/2.5V/3.3V multi-voltage generic POC BOAC I/O cell library