UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)
- UMC
- 28nm
- HPC
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)
UMC 40nm uLP/RVT Logic Process SYNS-like 9T GENERIC CORE Cell Library
UMC 40nm uLP/RVT Logic Process SYNS-like 9T GENERIC CORE Cell Library
UMC 40nm uLP/LVT Logic Process SYNS-like 9T GENERIC CORE Cell Library
UMC 40nm uLP/LVT Logic Process SYNS-like 9T GENERIC CORE Cell Library
UMC 40nm uLP/HVT Logic Process SYNS-like 9T GENERIC CORE Cell Library
UMC 40nm uLP/HVT Logic Process SYNS-like 9T GENERIC CORE Cell Library
UMC 40nm LP/RVT Logic Process SYNS-like 9T GENERIC CORE Cell Library
UMC 40nm LP/RVT Logic Process SYNS-like 9T GENERIC CORE Cell Library
UMC 40nm LP/LVT Logic Process SYNS-like 9T GENERIC CORE Cell Library
UMC 40nm LP/LVT Logic Process SYNS-like 9T GENERIC CORE Cell Library
UMC 40nm LP/HVT Logic Process SYNS-like 9T GENERIC CORE Cell Library
UMC 40nm LP/HVT Logic Process SYNS-like 9T GENERIC CORE Cell Library
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with with LPLUS (C38 RVT)
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track generic core cell library
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track generic core cell library
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with LMINUS (C31 RVT)
UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with with LPLUS (C38 LVT)
UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library
UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library
UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with LMINUS (C31 LVT)
UMC 28nm HPM/HVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with with LPLUS (C38 HVT)