PCIe Gen4 x8 Lane Endpoint Controller
PCIe Gen4 x8 Lane Endpoint Controller
- PCIe 4.0
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
PCIe Gen4 x8 Lane Endpoint Controller
PCIe Gen4 x8 Lane Endpoint Controller
SMIC 28nm USB3.0 Dual Role PHY/Type-C
The USB3.0 Type-C PHY IP is designed to the USB 3.0, USB2.0 Specification and the USB Type-CTM USB Cable and Connector Specificat…
HHGrace 0.18um 5v-1.125v Power Regulator
The Power Regulator is to provide 1.125v power supplies which are regulated from the single 5v input supply.
HHGrace 0.18um 5v-1.8/3.3v Power Regulator
The Power Regulator is to provide both 3.3v and 1.8v power supplies which are regulated from thesingle 5v input supply.
HHGrace 0.18um 3.3v-1.8v Power Regulator
This IP is a Low-Dropout (LDO) 3.3V to 1.62 V power regulator with two channel 1.8V output.
GSMC 0.13um 5v-1.5v Power Regulator
This IP is a Low-Dropout (LDO) 5V to 1.5V power regulator with two channel outputs.
SMIC 28nm High-K 1.8V/0.9V PLL
This IP is a programmable Analog PLL suitable for high speed clock generation.
Samsung 28nm FDSOI 1.8v/1.0v APLL
This IP is a programmable Analog PLL suitable for high speed clock generation.
DDR3 SDRAM Controller IP Core Pinout Utility
Overview The DDR3 Pinout Generation Utility is a GUI tool that is capable of generating the pinout and preference files that cont…
HHGrace 0.18um 1.8V RC Oscillator
This IP is a ring oscillator to generate 25MHz ±5% clock with trimming.
ARINC 664 End System Controller
ARINC 664 End System Controller
Utility for instantiating various buffers, suchs as BUFG and differential IO buffers, in Vivado IP Integrator.
Xilinx provided utility function to simplify design in Vivado IP Integrator.
HHGrace 0.18um 3.3V RC Oscillator
The present IP is a ring oscillator to generate 125KHz±3% clock.
HHGrace 0.18um 3.3V RC Oscillator
The present IP is a ring oscillator to generate 125KHz±6% clock.
HHGrace 0.18um 3.3V RC Oscillator
The present IP specifies a Ring Oscillator with 1.8V power supply and less than 50uA operating current.
HHGrace 0.18um 3.3V RC Oscillator
The present IP is a ring oscillator to generate 1KHz±35% clock.
HHGrace 0.13um LP DG Multiple Power Supply IO library
Multiple power supply IO library for HHGrace 0.13um Eflash Low Power Dual Gate ( 1.5V/5V ) process
The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolut…
GSMC 0.11um CIS process LVDS Transceiver Pad
This transmitter provides CMOS signal to LVDS, and the receiver provides LVDS signal to CMOS.