This analog 2-1 MUX is designed for low speed application.
- SMIC
- 130nm
- G
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
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This analog 2-1 MUX is designed for low speed application.
SMIC 0.13um 24-Bit Stereo Sigma-Delta ADC
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SMIC 0.13um 1.2v / 3.3v Audio PLL
This PLL is designed for audio clock generation.
This IP is a programmable Analog PLL suitable for high speed clock generation.
VeriSilicon SMIC 0.11um 1.2V/3.3V ANALOGIO_DUP_05 IO Library
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The LEON4 processor builds on the success of its predecessors, providing enhanced performance and efficiency for demanding space …
Digital post‑linearization increases the effective resolution of analog‑to‑digital conversions.
SATA Host controller on Virtex 5 FXT
The LDS SATA HOST XF5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA.
The XPS PS2 Controller is a PLB (Processor Local Bus) slave that is designed to control PS2 devices such as keyboard and mouse.
The In System Flash (ISF) is type of serial flash memory and it is present only on the Spartan™-3AN devices.
In a multi processor environment the processors share common resources.
XPS Mailbox features a bi-directional communication channel between two processors.
This core allows memory mapped access to a LocalLink interface.
The XPS HWICAP (Hardware ICAP) IP enables an embedded microprocessor, such as the MicroBlaze™ or PowerPC™ to read and write the F…
Xilinx MicroBlaze Trace Core (XMTC)
This document provides the design specification for the Xilinx MicroBlaze Trace Core (XMTC), which provides instruction and data …
The XPS Thin Film Transistor (TFT) controller is a hardware display controller IP core capable of displaying 256k colors.
The XPS Timer/Counter is a 32-bit timer module that attaches to the PLB bus.
The XPS Timebase Watchdog Timer Interface is a 32-bit peripheral that connects to the PLB (Processor Local Bus) and provides the …
XPS System Monitor/Analog Digital Converter
The XPS SYSMON ADC IP Core is a 32-bit slave peripheral that connects to the PLB (Processor Local Bus) and provides the controlle…
The XPS Interrupt Controller (XPS INTC) concentrates multiple interrupt inputs from peripheral devices to a single interrupt outp…