1G UDP/IP Hardware Protocol Stack
The core Implements a UDP/IP hardware protocol stack that enables wire-speed communication over a LAN or a point-to-point connect…
- Ethernet
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
1G UDP/IP Hardware Protocol Stack
The core Implements a UDP/IP hardware protocol stack that enables wire-speed communication over a LAN or a point-to-point connect…
AES-XTS Storage Encrypt/Decrypt Engine
The AES-XTS encryption IP core implements hardware encryption/decryption for sector-based storage data.
Phoenix is a programmable HDR Image Signal Processor (ISP) solution.
Configuration-over-Ethernet (COE) IP Core
Configuration-over-Ethernet (COE) is a Layer 2 configuration protocol design by SoC-e to access remotely to FPGAs that implements…
The 8b10b line code is widely used to achieve DC-balance and bounded disparity when transmitting serial data over a medium.
TSMC 180 BCD, SESAME eLC DV is specifically designed to enable robust dual voltage operation, with characterizations taking into …
Foundry sponsored - Single Port SRAM compiler - TSMC 90 nm LPeF - Memory optimized for high density and Low power - compiler rang…
Foundry sponsored - Single Port Register File compiler - TSMC 90 nm LPeF - Memory optimized for high density and high speed - com…
Single Port Register File compiler - TSMC 90 nm LPeF - Memory optimized for high density and high speed - Dual voltage - compiler…
The sCODa95-H1-LR_08 is a feature-rich audio CODEC which provides the insurance of the best sound quality after integration into …
10/100 Ethernet PHY, TSMC 28nm HPC+
-10 100ETHERNET-T28HPCP18 is a single-port DSP-based Fast Ethernet Transceiver.
Silterra 0.18um ULL Process 7track Power Management Kit
Silterra 0.18um Ultra Low Leakage 7track PMK Library
Silterra 0.18um ULL Process 7track Std Cell Library
Silterra 0.18um Ultra Low Leakage 7track Std Cell Library
Silterra 0.18um ULL Process Multiple power supply IO library with high voltage tolerance
Silterra 0.18um Ultra Multiple power supply IO Library with high voltage tolerance
The Geon™ Secure Execution Processor is a low-power, 32-bit processor IP core with built-in protection of sensitive code and data.
SAMSUNG 28nm FDSOI USB2.0 Dual Role PHY/OTG PHY
The USB 2.0 OTG PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard.
GLOBALFOUNDRIES 28nm USB2.0 Dual Role PHY/OTG PHY
The USB 2.0 OTG PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard.
GLOBALFOUNDRIES 55nm USB2.0 Dual Role PHY
The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard.
GLOBALFOUNDRIES 0.13um USB2.0 Dual Role PHY
The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard.
GLOBALFOUNDRIES 0.11um USB2.0 Dual Role PHY
The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard.